1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
4 * (C) Copyright 2013 - 2018 Xilinx, Inc.
18 #include <asm/arch/hardware.h>
19 #include <asm/arch/sys_proto.h>
21 DECLARE_GLOBAL_DATA_PTR;
28 int board_late_init(void)
30 int env_targets_len = 0;
35 switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
38 env_set("modeboot", "qspiboot");
42 env_set("modeboot", "nandboot");
46 env_set("modeboot", "norboot");
50 env_set("modeboot", "sdboot");
54 env_set("modeboot", "jtagboot");
58 env_set("modeboot", "");
63 * One terminating char + one byte for space between mode
64 * and default boot_targets
66 env_targets = env_get("boot_targets");
68 env_targets_len = strlen(env_targets);
70 new_targets = calloc(1, strlen(mode) + env_targets_len + 2);
74 sprintf(new_targets, "%s %s", mode,
75 env_targets ? env_targets : "");
77 env_set("boot_targets", new_targets);
82 #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
83 int dram_init_banksize(void)
85 return fdtdec_setup_memory_banksize();
90 if (fdtdec_setup_mem_size_base() != 0)
100 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
101 CONFIG_SYS_SDRAM_SIZE);