2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
4 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/hardware.h>
13 #include <asm/arch/sys_proto.h>
15 DECLARE_GLOBAL_DATA_PTR;
17 #if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
18 (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
19 static xilinx_desc fpga;
21 /* It can be done differently */
22 static xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10);
23 static xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15);
24 static xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20);
25 static xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30);
26 static xilinx_desc fpga035 = XILINX_XC7Z035_DESC(0x35);
27 static xilinx_desc fpga045 = XILINX_XC7Z045_DESC(0x45);
28 static xilinx_desc fpga100 = XILINX_XC7Z100_DESC(0x100);
33 #if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
34 (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
37 idcode = zynq_slcr_get_idcode();
40 case XILINX_ZYNQ_7010:
43 case XILINX_ZYNQ_7015:
46 case XILINX_ZYNQ_7020:
49 case XILINX_ZYNQ_7030:
52 case XILINX_ZYNQ_7035:
55 case XILINX_ZYNQ_7045:
58 case XILINX_ZYNQ_7100:
64 #if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
65 (defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
67 fpga_add(fpga_xilinx, &fpga);
73 int board_late_init(void)
75 switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
77 setenv("modeboot", "norboot");
80 setenv("modeboot", "sdboot");
83 setenv("modeboot", "jtagboot");
86 setenv("modeboot", "");
93 #ifdef CONFIG_DISPLAY_BOARDINFO
96 puts("Board: Xilinx Zynq\n");
106 const void *blob = gd->fdt_blob;
108 node = fdt_node_offset_by_prop_value(blob, -1, "device_type",
110 if (node == -FDT_ERR_NOTFOUND) {
111 debug("ZYNQ DRAM: Can't get memory node\n");
114 addr = fdtdec_get_addr_size(blob, node, "reg", &size);
115 if (addr == FDT_ADDR_T_NONE || size == 0) {
116 debug("ZYNQ DRAM: Can't get base address or size\n");