1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2019 Xilinx, Inc.
4 * Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
10 struct fru_common_hdr {
21 #define FRU_BOARD_MAX_LEN 32
23 struct __packed fru_board_info_header {
30 struct __packed fru_board_info_member {
35 struct fru_board_data {
40 u8 manufacturer_type_len;
41 u8 manufacturer_name[FRU_BOARD_MAX_LEN];
42 u8 product_name_type_len;
43 u8 product_name[FRU_BOARD_MAX_LEN];
44 u8 serial_number_type_len;
45 u8 serial_number[FRU_BOARD_MAX_LEN];
46 u8 part_number_type_len;
47 u8 part_number[FRU_BOARD_MAX_LEN];
49 u8 file_id[FRU_BOARD_MAX_LEN];
50 /* Xilinx custom fields */
52 u8 rev[FRU_BOARD_MAX_LEN];
54 u8 pcie[FRU_BOARD_MAX_LEN];
56 u8 uuid[FRU_BOARD_MAX_LEN];
60 struct fru_common_hdr hdr;
61 struct fru_board_data brd;
65 #define FRU_TYPELEN_CODE_MASK 0xC0
66 #define FRU_TYPELEN_LEN_MASK 0x3F
67 #define FRU_COMMON_HDR_VER_MASK 0xF
68 #define FRU_COMMON_HDR_LEN_MULTIPLIER 8
69 #define FRU_LANG_CODE_ENGLISH 0
70 #define FRU_LANG_CODE_ENGLISH_1 25
71 #define FRU_TYPELEN_EOF 0xC1
73 /* This should be minimum of fields */
74 #define FRU_BOARD_AREA_TOTAL_FIELDS 5
75 #define FRU_TYPELEN_TYPE_SHIFT 6
76 #define FRU_TYPELEN_TYPE_BINARY 0
77 #define FRU_TYPELEN_TYPE_ASCII8 3
79 int fru_display(int verbose);
80 int fru_capture(unsigned long addr);
81 int fru_generate(unsigned long addr, char *manufacturer, char *board_name,
82 char *serial_no, char *part_no, char *revision);
83 u8 fru_checksum(u8 *addr, u8 len);
85 extern struct fru_table fru_data;