board/warp7/warp7.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2016 NXP Semiconductors
   4  * Author: Fabio Estevam <fabio.estevam@nxp.com>
   5  */
   6
   7 #include <asm/arch/clock.h>
   8 #include <asm/arch/imx-regs.h>
   9 #include <asm/arch/mx7-pins.h>
  10 #include <asm/arch/sys_proto.h>
  11 #include <asm/gpio.h>
  12 #include <asm/mach-imx/hab.h>
  13 #include <asm/mach-imx/iomux-v3.h>
  14 #include <asm/mach-imx/mxc_i2c.h>
  15 #include <asm/io.h>
  16 #include <common.h>
  17 #include <fsl_esdhc.h>
  18 #include <i2c.h>
  19 #include <mmc.h>
  20 #include <asm/arch/crm_regs.h>
  21 #include <usb.h>
  22 #include <netdev.h>
  23 #include <power/pmic.h>
  24 #include <power/pfuze3000_pmic.h>
  25 #include "../freescale/common/pfuze.h"
  26 #include <asm/setup.h>
  27 #include <asm/bootm.h>
  28
  29 DECLARE_GLOBAL_DATA_PTR;
  30
  31 #define UART_PAD_CTRL  (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU100KOHM | \
  32                         PAD_CTL_HYS)
  33
  34 int dram_init(void)
  35 {
  36         gd->ram_size = PHYS_SDRAM_SIZE;
  37
  38         /* Subtract the defined OPTEE runtime firmware length */
  39 #ifdef CONFIG_OPTEE_TZDRAM_SIZE
  40                 gd->ram_size -= CONFIG_OPTEE_TZDRAM_SIZE;
  41 #endif
  42
  43         return 0;
  44 }
  45
  46 static iomux_v3_cfg_t const wdog_pads[] = {
  47         MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL),
  48 };
  49
  50 static iomux_v3_cfg_t const uart1_pads[] = {
  51         MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
  52         MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
  53 };
  54
  55 static void setup_iomux_uart(void)
  56 {
  57         imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
  58 };
  59
  60 int board_early_init_f(void)
  61 {
  62         setup_iomux_uart();
  63
  64         return 0;
  65 }
  66
  67 #ifdef CONFIG_POWER
  68 #define I2C_PMIC       0
  69 static struct pmic *pfuze;
  70 int power_init_board(void)
  71 {
  72         int ret;
  73         unsigned int reg, rev_id;
  74
  75         ret = power_pfuze3000_init(I2C_PMIC);
  76         if (ret)
  77                 return ret;
  78
  79         pfuze = pmic_get("PFUZE3000");
  80         ret = pmic_probe(pfuze);
  81         if (ret)
  82                 return ret;
  83
  84         pmic_reg_read(pfuze, PFUZE3000_DEVICEID, &reg);
  85         pmic_reg_read(pfuze, PFUZE3000_REVID, &rev_id);
  86         printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", reg, rev_id);
  87
  88         /* disable Low Power Mode during standby mode */
  89         pmic_reg_write(pfuze, PFUZE3000_LDOGCTL, 0x1);
  90
  91         return 0;
  92 }
  93 #endif
  94
  95 int board_eth_init(bd_t *bis)
  96 {
  97         int ret = 0;
  98
  99 #ifdef CONFIG_USB_ETHER
 100         ret = usb_eth_initialize(bis);
 101         if (ret < 0)
 102                 printf("Error %d registering USB ether.\n", ret);
 103 #endif
 104
 105         return ret;
 106 }
 107
 108 int board_init(void)
 109 {
 110         /* address of boot parameters */
 111         gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 112
 113         return 0;
 114 }
 115
 116 int checkboard(void)
 117 {
 118         char *mode;
 119
 120         if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT))
 121                 mode = "secure";
 122         else
 123                 mode = "non-secure";
 124
 125 #ifdef CONFIG_OPTEE_TZDRAM_SIZE
 126         unsigned long optee_start, optee_end;
 127
 128         optee_end = PHYS_SDRAM + PHYS_SDRAM_SIZE;
 129         optee_start = optee_end - CONFIG_OPTEE_TZDRAM_SIZE;
 130
 131         printf("Board: WARP7 in %s mode OPTEE DRAM 0x%08lx-0x%08lx\n",
 132                mode, optee_start, optee_end);
 133 #else
 134         printf("Board: WARP7 in %s mode\n", mode);
 135 #endif
 136
 137         return 0;
 138 }
 139
 140 int board_usb_phy_mode(int port)
 141 {
 142         return USB_INIT_DEVICE;
 143 }
 144
 145 int board_late_init(void)
 146 {
 147         struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
 148 #ifdef CONFIG_SERIAL_TAG
 149         struct tag_serialnr serialnr;
 150         char serial_string[0x20];
 151 #endif
 152
 153         imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
 154
 155         set_wdog_reset(wdog);
 156
 157         /*
 158          * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4),
 159          * since we use PMIC_PWRON to reset the board.
 160          */
 161         clrsetbits_le16(&wdog->wcr, 0, 0x10);
 162
 163 #ifdef CONFIG_SECURE_BOOT
 164         /* Determine HAB state */
 165         env_set_ulong(HAB_ENABLED_ENVNAME, imx_hab_is_enabled());
 166 #else
 167         env_set_ulong(HAB_ENABLED_ENVNAME, 0);
 168 #endif
 169
 170 #ifdef CONFIG_SERIAL_TAG
 171         /* Set serial# standard environment variable based on OTP settings */
 172         get_board_serial(&serialnr);
 173         snprintf(serial_string, sizeof(serial_string), "WaRP7-0x%08x%08x",
 174                  serialnr.low, serialnr.high);
 175         env_set("serial#", serial_string);
 176 #endif
 177
 178         return 0;
 179 }