1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2016 NXP Semiconductors
4 * Author: Fabio Estevam <fabio.estevam@nxp.com>
7 #include <asm/arch/clock.h>
8 #include <asm/arch/imx-regs.h>
9 #include <asm/arch/mx7-pins.h>
10 #include <asm/arch/sys_proto.h>
12 #include <asm/mach-imx/hab.h>
13 #include <asm/mach-imx/iomux-v3.h>
14 #include <asm/mach-imx/mxc_i2c.h>
17 #include <fsl_esdhc.h>
20 #include <asm/arch/crm_regs.h>
23 #include <power/pmic.h>
24 #include <power/pfuze3000_pmic.h>
25 #include "../freescale/common/pfuze.h"
26 #include <asm/setup.h>
27 #include <asm/bootm.h>
29 DECLARE_GLOBAL_DATA_PTR;
31 #define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU100KOHM | \
34 #define I2C_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
35 PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU100KOHM)
37 #ifdef CONFIG_SYS_I2C_MXC
38 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
40 static struct i2c_pads_info i2c_pad_info1 = {
42 .i2c_mode = MX7D_PAD_I2C1_SCL__I2C1_SCL | PC,
43 .gpio_mode = MX7D_PAD_I2C1_SCL__GPIO4_IO8 | PC,
44 .gp = IMX_GPIO_NR(4, 8),
47 .i2c_mode = MX7D_PAD_I2C1_SDA__I2C1_SDA | PC,
48 .gpio_mode = MX7D_PAD_I2C1_SDA__GPIO4_IO9 | PC,
49 .gp = IMX_GPIO_NR(4, 9),
56 gd->ram_size = PHYS_SDRAM_SIZE;
58 /* Subtract the defined OPTEE runtime firmware length */
59 #ifdef CONFIG_OPTEE_TZDRAM_SIZE
60 gd->ram_size -= CONFIG_OPTEE_TZDRAM_SIZE;
66 static iomux_v3_cfg_t const wdog_pads[] = {
67 MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL),
70 static iomux_v3_cfg_t const uart1_pads[] = {
71 MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
72 MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
75 static void setup_iomux_uart(void)
77 imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
80 int board_early_init_f(void)
89 static struct pmic *pfuze;
90 int power_init_board(void)
93 unsigned int reg, rev_id;
95 ret = power_pfuze3000_init(I2C_PMIC);
99 pfuze = pmic_get("PFUZE3000");
100 ret = pmic_probe(pfuze);
104 pmic_reg_read(pfuze, PFUZE3000_DEVICEID, ®);
105 pmic_reg_read(pfuze, PFUZE3000_REVID, &rev_id);
106 printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", reg, rev_id);
108 /* disable Low Power Mode during standby mode */
109 pmic_reg_write(pfuze, PFUZE3000_LDOGCTL, 0x1);
115 int board_eth_init(bd_t *bis)
119 #ifdef CONFIG_USB_ETHER
120 ret = usb_eth_initialize(bis);
122 printf("Error %d registering USB ether.\n", ret);
130 /* address of boot parameters */
131 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
133 #ifdef CONFIG_SYS_I2C_MXC
134 setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
144 if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT))
149 #ifdef CONFIG_OPTEE_TZDRAM_SIZE
150 unsigned long optee_start, optee_end;
152 optee_end = PHYS_SDRAM + PHYS_SDRAM_SIZE;
153 optee_start = optee_end - CONFIG_OPTEE_TZDRAM_SIZE;
155 printf("Board: WARP7 in %s mode OPTEE DRAM 0x%08lx-0x%08lx\n",
156 mode, optee_start, optee_end);
158 printf("Board: WARP7 in %s mode\n", mode);
164 int board_usb_phy_mode(int port)
166 return USB_INIT_DEVICE;
169 int board_late_init(void)
171 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
172 #ifdef CONFIG_SERIAL_TAG
173 struct tag_serialnr serialnr;
174 char serial_string[0x20];
177 imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
179 set_wdog_reset(wdog);
182 * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4),
183 * since we use PMIC_PWRON to reset the board.
185 clrsetbits_le16(&wdog->wcr, 0, 0x10);
187 #ifdef CONFIG_SECURE_BOOT
188 /* Determine HAB state */
189 env_set_ulong(HAB_ENABLED_ENVNAME, imx_hab_is_enabled());
191 env_set_ulong(HAB_ENABLED_ENVNAME, 0);
194 #ifdef CONFIG_SERIAL_TAG
195 /* Set serial# standard environment variable based on OTP settings */
196 get_board_serial(&serialnr);
197 snprintf(serial_string, sizeof(serial_string), "WaRP7-0x%08x%08x",
198 serialnr.low, serialnr.high);
199 env_set("serial#", serial_string);