1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2016 NXP Semiconductors
4 * Author: Fabio Estevam <fabio.estevam@nxp.com>
7 #include <asm/arch/clock.h>
8 #include <asm/arch/imx-regs.h>
9 #include <asm/arch/mx7-pins.h>
10 #include <asm/arch/sys_proto.h>
12 #include <asm/mach-imx/hab.h>
13 #include <asm/mach-imx/iomux-v3.h>
17 #include <asm/arch/crm_regs.h>
19 #include <power/pmic.h>
20 #include <power/pfuze3000_pmic.h>
21 #include "../freescale/common/pfuze.h"
22 #include <asm/setup.h>
23 #include <asm/bootm.h>
25 DECLARE_GLOBAL_DATA_PTR;
27 #define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU100KOHM | \
32 gd->ram_size = PHYS_SDRAM_SIZE;
34 /* Subtract the defined OPTEE runtime firmware length */
35 #ifdef CONFIG_OPTEE_TZDRAM_SIZE
36 gd->ram_size -= CONFIG_OPTEE_TZDRAM_SIZE;
42 static iomux_v3_cfg_t const wdog_pads[] = {
43 MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL),
46 static iomux_v3_cfg_t const uart1_pads[] = {
47 MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
48 MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
51 static void setup_iomux_uart(void)
53 imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
56 int board_early_init_f(void)
64 int power_init_board(void)
67 int ret, dev_id, rev_id;
69 ret = pmic_get("pfuze3000", &dev);
75 dev_id = pmic_reg_read(dev, PFUZE3000_DEVICEID);
76 rev_id = pmic_reg_read(dev, PFUZE3000_REVID);
77 printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
79 /* disable Low Power Mode during standby mode */
80 pmic_reg_write(dev, PFUZE3000_LDOGCTL, 1);
86 int board_eth_init(bd_t *bis)
90 #ifdef CONFIG_USB_ETHER
91 ret = usb_eth_initialize(bis);
93 printf("Error %d registering USB ether.\n", ret);
101 /* address of boot parameters */
102 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
111 if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT))
116 #ifdef CONFIG_OPTEE_TZDRAM_SIZE
117 unsigned long optee_start, optee_end;
119 optee_end = PHYS_SDRAM + PHYS_SDRAM_SIZE;
120 optee_start = optee_end - CONFIG_OPTEE_TZDRAM_SIZE;
122 printf("Board: WARP7 in %s mode OPTEE DRAM 0x%08lx-0x%08lx\n",
123 mode, optee_start, optee_end);
125 printf("Board: WARP7 in %s mode\n", mode);
131 int board_late_init(void)
133 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
134 #ifdef CONFIG_SERIAL_TAG
135 struct tag_serialnr serialnr;
136 char serial_string[0x20];
139 imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
141 set_wdog_reset(wdog);
144 * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4),
145 * since we use PMIC_PWRON to reset the board.
147 clrsetbits_le16(&wdog->wcr, 0, 0x10);
149 #ifdef CONFIG_SECURE_BOOT
150 /* Determine HAB state */
151 env_set_ulong(HAB_ENABLED_ENVNAME, imx_hab_is_enabled());
153 env_set_ulong(HAB_ENABLED_ENVNAME, 0);
156 #ifdef CONFIG_SERIAL_TAG
157 /* Set serial# standard environment variable based on OTP settings */
158 get_board_serial(&serialnr);
159 snprintf(serial_string, sizeof(serial_string), "WaRP7-0x%08x%08x",
160 serialnr.low, serialnr.high);
161 env_set("serial#", serial_string);