1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2016 NXP Semiconductors
4 * Author: Fabio Estevam <fabio.estevam@nxp.com>
7 #include <asm/arch/clock.h>
8 #include <asm/arch/imx-regs.h>
9 #include <asm/arch/mx7-pins.h>
10 #include <asm/arch/sys_proto.h>
12 #include <asm/mach-imx/hab.h>
13 #include <asm/mach-imx/iomux-v3.h>
16 #include <asm/arch/crm_regs.h>
18 #include <power/pmic.h>
19 #include <power/pfuze3000_pmic.h>
20 #include "../freescale/common/pfuze.h"
21 #include <asm/setup.h>
22 #include <asm/bootm.h>
24 DECLARE_GLOBAL_DATA_PTR;
26 #define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU100KOHM | \
31 gd->ram_size = PHYS_SDRAM_SIZE;
33 /* Subtract the defined OPTEE runtime firmware length */
34 #ifdef CONFIG_OPTEE_TZDRAM_SIZE
35 gd->ram_size -= CONFIG_OPTEE_TZDRAM_SIZE;
41 static iomux_v3_cfg_t const wdog_pads[] = {
42 MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL),
45 static iomux_v3_cfg_t const uart1_pads[] = {
46 MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
47 MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
50 static void setup_iomux_uart(void)
52 imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
55 int board_early_init_f(void)
63 int power_init_board(void)
66 int ret, dev_id, rev_id;
68 ret = pmic_get("pfuze3000", &dev);
74 dev_id = pmic_reg_read(dev, PFUZE3000_DEVICEID);
75 rev_id = pmic_reg_read(dev, PFUZE3000_REVID);
76 printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
78 /* disable Low Power Mode during standby mode */
79 pmic_reg_write(dev, PFUZE3000_LDOGCTL, 1);
85 int board_eth_init(bd_t *bis)
89 #ifdef CONFIG_USB_ETHER
90 ret = usb_eth_initialize(bis);
92 printf("Error %d registering USB ether.\n", ret);
100 /* address of boot parameters */
101 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
110 if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT))
115 #ifdef CONFIG_OPTEE_TZDRAM_SIZE
116 unsigned long optee_start, optee_end;
118 optee_end = PHYS_SDRAM + PHYS_SDRAM_SIZE;
119 optee_start = optee_end - CONFIG_OPTEE_TZDRAM_SIZE;
121 printf("Board: WARP7 in %s mode OPTEE DRAM 0x%08lx-0x%08lx\n",
122 mode, optee_start, optee_end);
124 printf("Board: WARP7 in %s mode\n", mode);
130 int board_late_init(void)
132 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
133 #ifdef CONFIG_SERIAL_TAG
134 struct tag_serialnr serialnr;
135 char serial_string[0x20];
138 imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
140 set_wdog_reset(wdog);
143 * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4),
144 * since we use PMIC_PWRON to reset the board.
146 clrsetbits_le16(&wdog->wcr, 0, 0x10);
148 #ifdef CONFIG_SECURE_BOOT
149 /* Determine HAB state */
150 env_set_ulong(HAB_ENABLED_ENVNAME, imx_hab_is_enabled());
152 env_set_ulong(HAB_ENABLED_ENVNAME, 0);
155 #ifdef CONFIG_SERIAL_TAG
156 /* Set serial# standard environment variable based on OTP settings */
157 get_board_serial(&serialnr);
158 snprintf(serial_string, sizeof(serial_string), "WaRP7-0x%08x%08x",
159 serialnr.low, serialnr.high);
160 env_set("serial#", serial_string);