board/tqc/tqma6/tqma6.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2012 Freescale Semiconductor, Inc.
   4  * Author: Fabio Estevam <fabio.estevam@freescale.com>
   5  *
   6  * Copyright (C) 2013, 2014 TQ Systems (ported SabreSD to TQMa6x)
   7  * Author: Markus Niebel <markus.niebel@tq-group.com>
   8  */
   9
  10 #include <init.h>
  11 #include <asm/arch/clock.h>
  12 #include <asm/arch/mx6-pins.h>
  13 #include <asm/arch/imx-regs.h>
  14 #include <asm/arch/iomux.h>
  15 #include <asm/arch/sys_proto.h>
  16 #include <env.h>
  17 #include <linux/errno.h>
  18 #include <asm/gpio.h>
  19 #include <asm/io.h>
  20 #include <asm/mach-imx/mxc_i2c.h>
  21 #include <asm/mach-imx/spi.h>
  22 #include <common.h>
  23 #include <fsl_esdhc_imx.h>
  24 #include <linux/libfdt.h>
  25 #include <i2c.h>
  26 #include <mmc.h>
  27 #include <power/pfuze100_pmic.h>
  28 #include <power/pmic.h>
  29 #include <spi_flash.h>
  30
  31 #include "tqma6_bb.h"
  32
  33 DECLARE_GLOBAL_DATA_PTR;
  34
  35 #define USDHC_CLK_PAD_CTRL (PAD_CTL_PUS_47K_UP  | PAD_CTL_SPEED_LOW | \
  36         PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
  37
  38 #define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP  | PAD_CTL_SPEED_LOW | \
  39         PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
  40
  41 #define GPIO_OUT_PAD_CTRL  (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_LOW | \
  42         PAD_CTL_DSE_40ohm   | PAD_CTL_HYS)
  43
  44 #define GPIO_IN_PAD_CTRL  (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_LOW | \
  45         PAD_CTL_DSE_40ohm   | PAD_CTL_HYS)
  46
  47 #define SPI_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
  48         PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
  49
  50 #define I2C_PAD_CTRL    (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
  51         PAD_CTL_DSE_80ohm | PAD_CTL_HYS |                       \
  52         PAD_CTL_ODE | PAD_CTL_SRE_FAST)
  53
  54 int dram_init(void)
  55 {
  56         gd->ram_size = imx_ddr_size();
  57
  58         return 0;
  59 }
  60
  61 static const uint16_t tqma6_emmc_dsr = 0x0100;
  62
  63 #ifndef CONFIG_DM_MMC
  64 /* eMMC on USDHCI3 always present */
  65 static iomux_v3_cfg_t const tqma6_usdhc3_pads[] = {
  66         NEW_PAD_CTRL(MX6_PAD_SD3_CLK__SD3_CLK,          USDHC_PAD_CTRL),
  67         NEW_PAD_CTRL(MX6_PAD_SD3_CMD__SD3_CMD,          USDHC_PAD_CTRL),
  68         NEW_PAD_CTRL(MX6_PAD_SD3_DAT0__SD3_DATA0,       USDHC_PAD_CTRL),
  69         NEW_PAD_CTRL(MX6_PAD_SD3_DAT1__SD3_DATA1,       USDHC_PAD_CTRL),
  70         NEW_PAD_CTRL(MX6_PAD_SD3_DAT2__SD3_DATA2,       USDHC_PAD_CTRL),
  71         NEW_PAD_CTRL(MX6_PAD_SD3_DAT3__SD3_DATA3,       USDHC_PAD_CTRL),
  72         NEW_PAD_CTRL(MX6_PAD_SD3_DAT4__SD3_DATA4,       USDHC_PAD_CTRL),
  73         NEW_PAD_CTRL(MX6_PAD_SD3_DAT5__SD3_DATA5,       USDHC_PAD_CTRL),
  74         NEW_PAD_CTRL(MX6_PAD_SD3_DAT6__SD3_DATA6,       USDHC_PAD_CTRL),
  75         NEW_PAD_CTRL(MX6_PAD_SD3_DAT7__SD3_DATA7,       USDHC_PAD_CTRL),
  76         /* eMMC reset */
  77         NEW_PAD_CTRL(MX6_PAD_SD3_RST__SD3_RESET,        GPIO_OUT_PAD_CTRL),
  78 };
  79
  80 /*
  81  * According to board_mmc_init() the following map is done:
  82  * (U-Boot device node)    (Physical Port)
  83  * mmc0                    eMMC (SD3) on TQMa6
  84  * mmc1 .. n               optional slots used on baseboard
  85  */
  86 struct fsl_esdhc_cfg tqma6_usdhc_cfg = {
  87         .esdhc_base = USDHC3_BASE_ADDR,
  88         .max_bus_width = 8,
  89 };
  90
  91 int board_mmc_getcd(struct mmc *mmc)
  92 {
  93         struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
  94         int ret = 0;
  95
  96         if (cfg->esdhc_base == USDHC3_BASE_ADDR)
  97                 /* eMMC/uSDHC3 is always present */
  98                 ret = 1;
  99         else
 100                 ret = tqma6_bb_board_mmc_getcd(mmc);
 101
 102         return ret;
 103 }
 104
 105 int board_mmc_getwp(struct mmc *mmc)
 106 {
 107         struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
 108         int ret = 0;
 109
 110         if (cfg->esdhc_base == USDHC3_BASE_ADDR)
 111                 /* eMMC/uSDHC3 is always present */
 112                 ret = 0;
 113         else
 114                 ret = tqma6_bb_board_mmc_getwp(mmc);
 115
 116         return ret;
 117 }
 118
 119 int board_mmc_init(bd_t *bis)
 120 {
 121         imx_iomux_v3_setup_multiple_pads(tqma6_usdhc3_pads,
 122                                          ARRAY_SIZE(tqma6_usdhc3_pads));
 123         tqma6_usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
 124         if (fsl_esdhc_initialize(bis, &tqma6_usdhc_cfg)) {
 125                 puts("Warning: failed to initialize eMMC dev\n");
 126         } else {
 127                 struct mmc *mmc = find_mmc_device(0);
 128                 if (mmc)
 129                         mmc_set_dsr(mmc, tqma6_emmc_dsr);
 130         }
 131
 132         tqma6_bb_board_mmc_init(bis);
 133
 134         return 0;
 135 }
 136 #endif
 137
 138 #ifndef CONFIG_DM_SPI
 139 static iomux_v3_cfg_t const tqma6_ecspi1_pads[] = {
 140         /* SS1 */
 141         NEW_PAD_CTRL(MX6_PAD_EIM_D19__GPIO3_IO19, SPI_PAD_CTRL),
 142         NEW_PAD_CTRL(MX6_PAD_EIM_D16__ECSPI1_SCLK, SPI_PAD_CTRL),
 143         NEW_PAD_CTRL(MX6_PAD_EIM_D17__ECSPI1_MISO, SPI_PAD_CTRL),
 144         NEW_PAD_CTRL(MX6_PAD_EIM_D18__ECSPI1_MOSI, SPI_PAD_CTRL),
 145 };
 146
 147 #define TQMA6_SF_CS_GPIO IMX_GPIO_NR(3, 19)
 148
 149 static unsigned const tqma6_ecspi1_cs[] = {
 150         TQMA6_SF_CS_GPIO,
 151 };
 152
 153 __weak void tqma6_iomuxc_spi(void)
 154 {
 155         unsigned i;
 156
 157         for (i = 0; i < ARRAY_SIZE(tqma6_ecspi1_cs); ++i)
 158                 gpio_direction_output(tqma6_ecspi1_cs[i], 1);
 159         imx_iomux_v3_setup_multiple_pads(tqma6_ecspi1_pads,
 160                                          ARRAY_SIZE(tqma6_ecspi1_pads));
 161 }
 162
 163 #if defined(CONFIG_SF_DEFAULT_BUS) && defined(CONFIG_SF_DEFAULT_CS)
 164 int board_spi_cs_gpio(unsigned bus, unsigned cs)
 165 {
 166         return ((bus == CONFIG_SF_DEFAULT_BUS) &&
 167                 (cs == CONFIG_SF_DEFAULT_CS)) ? TQMA6_SF_CS_GPIO : -1;
 168 }
 169 #endif
 170 #endif
 171
 172 #ifdef CONFIG_SYS_I2C
 173 static struct i2c_pads_info tqma6_i2c3_pads = {
 174         /* I2C3: on board LM75, M24C64,  */
 175         .scl = {
 176                 .i2c_mode = NEW_PAD_CTRL(MX6_PAD_GPIO_5__I2C3_SCL,
 177                                          I2C_PAD_CTRL),
 178                 .gpio_mode = NEW_PAD_CTRL(MX6_PAD_GPIO_5__GPIO1_IO05,
 179                                           I2C_PAD_CTRL),
 180                 .gp = IMX_GPIO_NR(1, 5)
 181         },
 182         .sda = {
 183                 .i2c_mode = NEW_PAD_CTRL(MX6_PAD_GPIO_6__I2C3_SDA,
 184                                          I2C_PAD_CTRL),
 185                 .gpio_mode = NEW_PAD_CTRL(MX6_PAD_GPIO_6__GPIO1_IO06,
 186                                           I2C_PAD_CTRL),
 187                 .gp = IMX_GPIO_NR(1, 6)
 188         }
 189 };
 190
 191 static void tqma6_setup_i2c(void)
 192 {
 193         int ret;
 194         /*
 195          * use logical index for bus, e.g. I2C1 -> 0
 196          * warn on error
 197          */
 198         ret = setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &tqma6_i2c3_pads);
 199         if (ret)
 200                 printf("setup I2C3 failed: %d\n", ret);
 201 }
 202 #endif
 203
 204 int board_early_init_f(void)
 205 {
 206         return tqma6_bb_board_early_init_f();
 207 }
 208
 209 int board_init(void)
 210 {
 211         /* address of boot parameters */
 212         gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 213
 214 #ifndef CONFIG_DM_SPI
 215         tqma6_iomuxc_spi();
 216 #endif
 217 #ifdef CONFIG_SYS_I2C
 218         tqma6_setup_i2c();
 219 #endif
 220
 221         tqma6_bb_board_init();
 222
 223         return 0;
 224 }
 225
 226 static const char *tqma6_get_boardname(void)
 227 {
 228         u32 cpurev = get_cpu_rev();
 229
 230         switch ((cpurev & 0xFF000) >> 12) {
 231         case MXC_CPU_MX6SOLO:
 232                 return "TQMa6S";
 233                 break;
 234         case MXC_CPU_MX6DL:
 235                 return "TQMa6DL";
 236                 break;
 237         case MXC_CPU_MX6D:
 238                 return "TQMa6D";
 239                 break;
 240         case MXC_CPU_MX6Q:
 241                 return "TQMa6Q";
 242                 break;
 243         default:
 244                 return "??";
 245         };
 246 }
 247
 248 #ifdef CONFIG_POWER
 249 /* setup board specific PMIC */
 250 int power_init_board(void)
 251 {
 252         struct pmic *p;
 253         u32 reg, rev;
 254
 255         power_pfuze100_init(TQMA6_PFUZE100_I2C_BUS);
 256         p = pmic_get("PFUZE100");
 257         if (p && !pmic_probe(p)) {
 258                 pmic_reg_read(p, PFUZE100_DEVICEID, &reg);
 259                 pmic_reg_read(p, PFUZE100_REVID, &rev);
 260                 printf("PMIC: PFUZE100 ID=0x%02x REV=0x%02x\n", reg, rev);
 261         }
 262
 263         return 0;
 264 }
 265 #endif
 266
 267 int board_late_init(void)
 268 {
 269         env_set("board_name", tqma6_get_boardname());
 270
 271         tqma6_bb_board_late_init();
 272
 273         return 0;
 274 }
 275
 276 int checkboard(void)
 277 {
 278         printf("Board: %s on a %s\n", tqma6_get_boardname(),
 279                tqma6_bb_get_boardname());
 280         return 0;
 281 }
 282
 283 /*
 284  * Device Tree Support
 285  */
 286 #if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
 287 #define MODELSTRLEN 32u
 288 int ft_board_setup(void *blob, bd_t *bd)
 289 {
 290         char modelstr[MODELSTRLEN];
 291
 292         snprintf(modelstr, MODELSTRLEN, "TQ %s on %s", tqma6_get_boardname(),
 293                  tqma6_bb_get_boardname());
 294         do_fixup_by_path_string(blob, "/", "model", modelstr);
 295         fdt_fixup_memory(blob, (u64)PHYS_SDRAM, (u64)gd->ram_size);
 296         /* bring in eMMC dsr settings */
 297         do_fixup_by_path_u32(blob,
 298                              "/soc/aips-bus@02100000/usdhc@02198000",
 299                              "dsr", tqma6_emmc_dsr, 2);
 300         tqma6_bb_ft_board_setup(blob, bd);
 301
 302         return 0;
 303 }
 304 #endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */