1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2020 Toradex
7 #include <asm/arch/clock.h>
12 DECLARE_GLOBAL_DATA_PTR;
16 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
21 #if IS_ENABLED(CONFIG_FEC_MXC)
22 static int setup_fec(void)
24 struct iomuxc_gpr_base_regs *gpr =
25 (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
27 /* Use 125M anatop REF_CLK1 for ENET1, not from external */
28 clrsetbits_le32(&gpr->gpr[1], 0x2000, 0);
33 int board_phy_config(struct phy_device *phydev)
35 /* enable rgmii rxc skew and phy mode select to RGMII copper */
36 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
37 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
39 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
40 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
41 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
42 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
44 if (phydev->drv->config)
45 phydev->drv->config(phydev);
52 if (IS_ENABLED(CONFIG_FEC_MXC))
58 int board_mmc_get_env_dev(int devno)
63 int board_late_init(void)
68 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
69 int ft_board_setup(void *blob, bd_t *bd)