1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2020 Toradex
10 #include <asm/arch/clock.h>
11 #include <asm/arch/imx8-pins.h>
12 #include <asm/arch/iomux.h>
13 #include <asm/arch/sci/sci.h>
14 #include <asm/arch/sys_proto.h>
19 #include <linux/libfdt.h>
21 #include "../common/tdx-cfg-block.h"
23 DECLARE_GLOBAL_DATA_PTR;
25 #define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
26 (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
27 (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
28 (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
30 static iomux_cfg_t uart1_pads[] = {
31 SC_P_UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
32 SC_P_UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
35 static void setup_iomux_uart(void)
37 imx8_iomux_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
40 int board_early_init_f(void)
42 sc_pm_clock_rate_t rate;
46 * This works around that having only UART3 up the baudrate is 1.2M
47 * instead of 115.2k. Set UART0 clock root to 80 MHz
50 err = sc_pm_set_clock_rate(-1, SC_R_UART_0, SC_PM_CLK_PER, &rate);
51 if (err != SC_ERR_NONE)
54 /* Set UART3 clock root to 80 MHz and enable it */
56 err = sc_pm_setup_uart(SC_R_UART_1, rate);
57 if (err != SC_ERR_NONE)
65 #if IS_ENABLED(CONFIG_DM_GPIO)
66 static void board_gpio_init(void)
71 static inline void board_gpio_init(void) {}
74 #if IS_ENABLED(CONFIG_FEC_MXC)
77 int board_phy_config(struct phy_device *phydev)
79 if (phydev->drv->config)
80 phydev->drv->config(phydev);
88 puts("Model: Toradex Apalis iMX8X\n");
104 * Board specific reset that is system reset.
106 void reset_cpu(ulong addr)
111 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
112 int ft_board_setup(void *blob, struct bd_info *bd)
114 return ft_common_board_setup(blob, bd);
118 int board_mmc_get_env_dev(int devno)
123 int board_late_init(void)
125 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
126 /* TODO move to common */
127 env_set("board_name", "Apalis iMX8X");