1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2004-2008
4 * Texas Instruments, <www.ti.com>
7 * Sunil Kumar <sunilsaini05@gmail.com>
8 * Shashi Ranjan <shashiranjanmca05@gmail.com>
11 * Frederik Kriewitz <frederik@kriewitz.eu>
13 * Derived from Beagle Board and 3430 SDP code by
14 * Richard Woodruff <r-woodruff2@ti.com>
15 * Syed Mohammed Khasim <khasim@ti.com>
25 #include <asm/global_data.h>
27 #include <asm/arch/mmc_host_def.h>
28 #include <asm/arch/mux.h>
29 #include <asm/arch/sys_proto.h>
30 #include <asm/arch/mem.h>
31 #include <asm/mach-types.h>
32 #include "devkit8000.h"
34 #ifdef CONFIG_DRIVER_DM9000
39 DECLARE_GLOBAL_DATA_PTR;
41 static u32 gpmc_net_config[GPMC_MAX_REG] = {
51 static const struct ns16550_plat devkit8000_serial = {
52 .base = OMAP34XX_UART3,
54 .clock = V_NS16550_CLK,
55 .fcr = UART_FCR_DEFVAL,
58 U_BOOT_DRVINFO(devkit8000_uart) = {
65 * Description: Early hardware init.
69 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
70 /* board id for Linux */
71 gd->bd->bi_arch_number = MACH_TYPE_DEVKIT8000;
73 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
78 /* Configure GPMC registers for DM9000 */
79 #define DM9000_BASE 0x2c000000
80 static void gpmc_dm9000_config(void)
82 enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6],
83 DM9000_BASE, GPMC_SIZE_16M);
87 * Routine: misc_init_r
88 * Description: Configure board specific parts
92 struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
93 #ifdef CONFIG_DRIVER_DM9000
99 #ifdef CONFIG_TWL4030_LED
100 twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
103 #ifdef CONFIG_DRIVER_DM9000
104 gpmc_dm9000_config();
106 /* Use OMAP DIE_ID as MAC address */
107 if (!eth_env_get_enetaddr("ethaddr", enetaddr)) {
108 printf("ethaddr not set, using Die ID\n");
109 die_id_0 = readl(&id_base->die_id_0);
110 enetaddr[0] = 0x02; /* locally administered */
111 enetaddr[1] = readl(&id_base->die_id_1) & 0xff;
112 enetaddr[2] = (die_id_0 & 0xff000000) >> 24;
113 enetaddr[3] = (die_id_0 & 0x00ff0000) >> 16;
114 enetaddr[4] = (die_id_0 & 0x0000ff00) >> 8;
115 enetaddr[5] = (die_id_0 & 0x000000ff);
116 eth_env_set_enetaddr("ethaddr", enetaddr);
120 omap_die_id_display();
126 * Routine: set_muxconf_regs
127 * Description: Setting up the configuration Mux registers specific to the
128 * hardware. Many pins need to be moved from protect to primary
131 void set_muxconf_regs(void)
136 #if defined(CONFIG_MMC)
137 int board_mmc_init(struct bd_info *bis)
139 return omap_mmc_init(0, 0, 0, -1, -1);
143 #if defined(CONFIG_MMC)
144 void board_mmc_power_init(void)
146 twl4030_power_mmc_init(0);
150 #if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
152 * Routine: board_eth_init
153 * Description: Setting up the Ethernet hardware.
155 int board_eth_init(struct bd_info *bis)
157 return dm9000_initialize(bis);
161 #ifdef CONFIG_SPL_OS_BOOT
163 * Do board specific preparation before SPL
166 void spl_board_prepare_for_linux(void)
168 gpmc_dm9000_config();
172 * devkit8000 specific implementation of spl_start_uboot()
175 * 0 if the button is not pressed
176 * 1 if the button is pressed
178 int spl_start_uboot(void)
181 if (!gpio_request(SPL_OS_BOOT_KEY, "U-Boot key")) {
182 gpio_direction_input(SPL_OS_BOOT_KEY);
183 val = gpio_get_value(SPL_OS_BOOT_KEY);
184 gpio_free(SPL_OS_BOOT_KEY);
191 * Routine: get_board_mem_timings
192 * Description: If we use SPL then there is no x-loader nor config header
193 * so we have to setup the DDR timings ourself on the first bank. This
194 * provides the timing values back to the function that configures
195 * the memory. We have either one or two banks of 128MB DDR.
197 void get_board_mem_timings(struct board_sdrc_timings *timings)
199 /* General SDRC config */
200 timings->mcfg = MICRON_V_MCFG_165(128 << 20);
201 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
204 timings->ctrla = MICRON_V_ACTIMA_165;
205 timings->ctrlb = MICRON_V_ACTIMB_165;
207 timings->mr = MICRON_V_MR_165;