1 // SPDX-License-Identifier: GPL-2.0+
4 * Texas Instruments Incorporated, <www.ti.com>
5 * Steve Sakoman <steve@sakoman.com>
12 #include <asm/mach-types.h>
13 #include <asm/arch/sys_proto.h>
14 #include <asm/arch/mmc_host_def.h>
15 #include <asm/arch/clock.h>
16 #include <asm/arch/gpio.h>
21 #include "panda_mux_data.h"
23 #define PANDA_ULPI_PHY_TYPE_GPIO 182
24 #define PANDA_BOARD_ID_1_GPIO 101
25 #define PANDA_ES_BOARD_ID_1_GPIO 48
26 #define PANDA_BOARD_ID_2_GPIO 171
27 #define PANDA_ES_BOARD_ID_3_GPIO 3
28 #define PANDA_ES_BOARD_ID_4_GPIO 2
30 DECLARE_GLOBAL_DATA_PTR;
32 const struct omap_sysinfo sysinfo = {
33 "Board: OMAP4 Panda\n"
36 struct omap4_scrm_regs *const scrm = (struct omap4_scrm_regs *)0x4a30a000;
47 gd->bd->bi_arch_number = MACH_TYPE_OMAP4_PANDA;
48 gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
53 #if defined(CONFIG_SPL_OS_BOOT)
54 int spl_start_uboot(void)
56 /* break into full u-boot on 'c' */
57 if (serial_tstc() && serial_getc() == 'c')
62 #endif /* CONFIG_SPL_OS_BOOT */
64 int board_eth_init(bd_t *bis)
70 * Routine: get_board_revision
71 * Description: Detect if we are running on a panda revision A1-A6,
72 * or an ES panda board. This can be done by reading
73 * the level of GPIOs and checking the processor revisions.
74 * This should result in:
76 * GPIO171, GPIO101, GPIO182: 0 1 1 => A1-A5
77 * GPIO171, GPIO101, GPIO182: 1 0 1 => A6
79 * GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 0 1 1 => B1/B2
80 * GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 1 1 1 => B3
82 int get_board_revision(void)
84 int board_id0, board_id1, board_id2;
85 int board_id3, board_id4;
88 int processor_rev = omap_revision();
90 /* Setup the mux for the common board ID pins (gpio 171 and 182) */
91 writew((IEN | M3), (*ctrl)->control_padconf_core_base + UNIPRO_TX0);
92 writew((IEN | M3), (*ctrl)->control_padconf_core_base + FREF_CLK2_OUT);
94 board_id0 = gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO);
95 board_id2 = gpio_get_value(PANDA_BOARD_ID_2_GPIO);
97 if ((processor_rev >= OMAP4460_ES1_0 &&
98 processor_rev <= OMAP4460_ES1_1)) {
100 * Setup the mux for the ES specific board ID pins (gpio 101,
103 writew((IEN | M3), (*ctrl)->control_padconf_core_base +
105 writew((IEN | M3), (*ctrl)->control_padconf_core_base +
107 writew((IEN | M3), (*ctrl)->control_padconf_core_base +
110 board_id1 = gpio_get_value(PANDA_ES_BOARD_ID_1_GPIO);
111 board_id3 = gpio_get_value(PANDA_ES_BOARD_ID_3_GPIO);
112 board_id4 = gpio_get_value(PANDA_ES_BOARD_ID_4_GPIO);
114 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
115 env_set("board_name", "panda-es");
117 board_id = ((board_id4 << 4) | (board_id3 << 3) |
118 (board_id2 << 2) | (board_id1 << 1) | (board_id0));
120 /* Setup the mux for the Ax specific board ID pins (gpio 101) */
121 writew((IEN | M3), (*ctrl)->control_padconf_core_base +
124 board_id1 = gpio_get_value(PANDA_BOARD_ID_1_GPIO);
125 board_id = ((board_id2 << 2) | (board_id1 << 1) | (board_id0));
127 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
128 if ((board_id >= 0x3) && (processor_rev == OMAP4430_ES2_3))
129 env_set("board_name", "panda-a4");
137 * is_panda_es_rev_b3() - Detect if we are running on rev B3 of panda board ES
140 * Detect if we are running on B3 version of ES panda board,
141 * This can be done by reading the level of GPIO 171 and checking the
142 * processor revisions.
143 * GPIO171: 1 => Panda ES Rev B3
145 * Return : return 1 if Panda ES Rev B3 , else return 0
147 u8 is_panda_es_rev_b3(void)
149 int processor_rev = omap_revision();
152 if ((processor_rev >= OMAP4460_ES1_0 &&
153 processor_rev <= OMAP4460_ES1_1)) {
155 /* Setup the mux for the common board ID pins (gpio 171) */
157 (*ctrl)->control_padconf_core_base + UNIPRO_TX0);
159 /* if processor_rev is panda ES and GPIO171 is 1,it is rev b3 */
160 ret = gpio_get_value(PANDA_BOARD_ID_2_GPIO);
165 #ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
167 * emif_get_reg_dump() - emif_get_reg_dump strong function
169 * @emif_nr - emif base
170 * @regs - reg dump of timing values
172 * Strong function to override emif_get_reg_dump weak function in sdram_elpida.c
174 void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
176 u32 omap4_rev = omap_revision();
178 /* Same devices and geometry on both EMIFs */
179 if (omap4_rev == OMAP4430_ES1_0)
180 *regs = &emif_regs_elpida_380_mhz_1cs;
181 else if (omap4_rev == OMAP4430_ES2_0)
182 *regs = &emif_regs_elpida_200_mhz_2cs;
183 else if (omap4_rev == OMAP4430_ES2_3)
184 *regs = &emif_regs_elpida_400_mhz_1cs;
185 else if (omap4_rev < OMAP4470_ES1_0) {
186 if(is_panda_es_rev_b3())
187 *regs = &emif_regs_elpida_400_mhz_1cs;
189 *regs = &emif_regs_elpida_400_mhz_2cs;
192 *regs = &emif_regs_elpida_400_mhz_1cs;
195 void emif_get_dmm_regs(const struct dmm_lisa_map_regs
198 u32 omap_rev = omap_revision();
200 if (omap_rev == OMAP4430_ES1_0)
201 *dmm_lisa_regs = &lisa_map_2G_x_1_x_2;
202 else if (omap_rev == OMAP4430_ES2_3)
203 *dmm_lisa_regs = &lisa_map_2G_x_2_x_2;
204 else if (omap_rev < OMAP4460_ES1_0)
205 *dmm_lisa_regs = &lisa_map_2G_x_2_x_2;
207 *dmm_lisa_regs = &ma_lisa_map_2G_x_2_x_2;
213 * @brief misc_init_r - Configure Panda board specific configurations
214 * such as power configurations, ethernet initialization as phase2 of
219 int misc_init_r(void)
222 u32 auxclk, altclksrc;
224 /* EHCI is not supported on ES1.0 */
225 if (omap_revision() == OMAP4430_ES1_0)
228 get_board_revision();
230 gpio_direction_input(PANDA_ULPI_PHY_TYPE_GPIO);
231 phy_type = gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO);
234 /* ULPI PHY supplied by auxclk3 derived from sys_clk */
235 debug("ULPI PHY supplied by auxclk3\n");
237 auxclk = readl(&scrm->auxclk3);
239 auxclk &= ~AUXCLK_SRCSELECT_MASK;
240 auxclk |= AUXCLK_SRCSELECT_SYS_CLK << AUXCLK_SRCSELECT_SHIFT;
241 /* Set the divisor to 2 */
242 auxclk &= ~AUXCLK_CLKDIV_MASK;
243 auxclk |= AUXCLK_CLKDIV_2 << AUXCLK_CLKDIV_SHIFT;
244 /* Request auxilary clock #3 */
245 auxclk |= AUXCLK_ENABLE_MASK;
247 writel(auxclk, &scrm->auxclk3);
249 /* ULPI PHY supplied by auxclk1 derived from PER dpll */
250 debug("ULPI PHY supplied by auxclk1\n");
252 auxclk = readl(&scrm->auxclk1);
253 /* Select per DPLL */
254 auxclk &= ~AUXCLK_SRCSELECT_MASK;
255 auxclk |= AUXCLK_SRCSELECT_PER_DPLL << AUXCLK_SRCSELECT_SHIFT;
256 /* Set the divisor to 16 */
257 auxclk &= ~AUXCLK_CLKDIV_MASK;
258 auxclk |= AUXCLK_CLKDIV_16 << AUXCLK_CLKDIV_SHIFT;
259 /* Request auxilary clock #3 */
260 auxclk |= AUXCLK_ENABLE_MASK;
262 writel(auxclk, &scrm->auxclk1);
265 altclksrc = readl(&scrm->altclksrc);
267 /* Activate alternate system clock supplier */
268 altclksrc &= ~ALTCLKSRC_MODE_MASK;
269 altclksrc |= ALTCLKSRC_MODE_ACTIVE;
272 altclksrc |= ALTCLKSRC_ENABLE_INT_MASK | ALTCLKSRC_ENABLE_EXT_MASK;
274 writel(altclksrc, &scrm->altclksrc);
276 omap_die_id_usbethaddr();
281 void set_muxconf_regs(void)
283 do_set_mux((*ctrl)->control_padconf_core_base,
284 core_padconf_array_essential,
285 sizeof(core_padconf_array_essential) /
286 sizeof(struct pad_conf_entry));
288 do_set_mux((*ctrl)->control_padconf_wkup_base,
289 wkup_padconf_array_essential,
290 sizeof(wkup_padconf_array_essential) /
291 sizeof(struct pad_conf_entry));
293 if (omap_revision() >= OMAP4460_ES1_0)
294 do_set_mux((*ctrl)->control_padconf_wkup_base,
295 wkup_padconf_array_essential_4460,
296 sizeof(wkup_padconf_array_essential_4460) /
297 sizeof(struct pad_conf_entry));
300 #if defined(CONFIG_MMC)
301 int board_mmc_init(bd_t *bis)
303 return omap_mmc_init(0, 0, 0, -1, -1);
306 #if !defined(CONFIG_SPL_BUILD)
307 void board_mmc_power_init(void)
309 twl6030_power_mmc_init(0);
315 * get_board_rev() - get board revision
317 u32 get_board_rev(void)