3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
10 * Texas Instruments, <www.ti.com>
11 * Kshitij Gupta <Kshitij@ti.com>
13 * See file CREDITS for list of people who contributed to this
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 #if defined(CONFIG_OMAP730)
35 #include <./configs/omap730.h>
38 DECLARE_GLOBAL_DATA_PTR;
40 int test_boot_mode(void);
41 void spin_up_leds(void);
42 void flash__init (void);
43 void ether__init (void);
44 void set_muxconf_regs (void);
45 void peripheral_power_enable (void);
47 #define FLASH_ON_CS0 1
48 #define FLASH_ON_CS3 0
50 static inline void delay (unsigned long loops)
52 __asm__ volatile ("1:\n"
54 "bne 1b":"=r" (loops):"0" (loops));
57 int test_boot_mode(void)
59 /* Check for CS0 and CS3 address decode swapping */
60 if (*((volatile int *)EMIFS_CONFIG) & 0x00000002)
66 /* Toggle backup LED indication */
67 void toggle_backup_led(void)
69 static int backupLEDState = 0; /* Init variable so that the LED will be ON the first time */
70 volatile unsigned int *IOConfReg;
73 IOConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_5 + GPIO_DATA_OUTPUT);
75 if (backupLEDState != 0) {
76 *IOConfReg &= (0xFFFFEFFF);
79 *IOConfReg |= (0x00001000);
85 * Miscellaneous platform dependent initialisations
90 /* arch number of OMAP 730 P2 Board - Same as the Innovator! */
91 gd->bd->bi_arch_number = MACH_TYPE_OMAP_PERSEUS2;
93 /* adress of boot parameters */
94 gd->bd->bi_boot_params = 0x10000100;
96 /* Configure MUX settings */
99 peripheral_power_enable ();
101 /* Backup LED indication via GPIO_140 -> Red led if MUX correctly setup */
104 /* Hold GSM in reset until needed */
105 *((volatile unsigned short *)M_CTL) &= ~1;
108 * CSx timings, GPIO Mux ... setup
111 /* Flash: CS0 timings setup */
112 *((volatile unsigned int *) FLASH_CFG_0) = 0x0000fff3;
113 *((volatile unsigned int *) FLASH_ACFG_0_1) = 0x00000088;
115 /* Ethernet support trough the debug board */
116 /* CS1 timings setup */
117 *((volatile unsigned int *) FLASH_CFG_1) = 0x0000fff3;
118 *((volatile unsigned int *) FLASH_ACFG_0_1) = 0x00000000;
120 /* this speeds up your boot a quite a bit. However to make it
121 * work, you need make sure your kernel startup flush bug is fixed.
132 /******************************
135 ******************************/
136 void flash__init (void)
140 regval = *((volatile unsigned int *) EMIFS_CONFIG);
141 /* Turn off write protection for flash devices. */
142 regval = regval | 0x0001;
143 *((volatile unsigned int *) EMIFS_CONFIG) = regval;
146 /*************************************************************
148 Description: take the Ethernet controller out of reset and wait
149 for the EEPROM load to complete.
150 *************************************************************/
151 void ether__init (void)
153 #define LAN_RESET_REGISTER 0x0400001c
155 *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
157 *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0001;
159 } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0001);
162 *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000;
164 } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0000);
166 #define ETH_CONTROL_REG 0x0400030b
168 *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
172 /******************************
175 ******************************/
178 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
179 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
184 /******************************************************
185 Routine: set_muxconf_regs
186 Description: Setting up the configuration Mux registers
187 specific to the hardware
188 *******************************************************/
189 void set_muxconf_regs (void)
191 volatile unsigned int *MuxConfReg;
192 /* set each registers to its reset value; */
195 * Backup LED Indication
198 /* Configure MUXed pin. Mode 6: GPIO_140 */
199 MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF10);
200 *MuxConfReg &= (0xFFFFFF1F); /* Clear D_MPU_LPG1 */
201 *MuxConfReg |= 0x000000C0; /* Set D_MPU_LPG1 to 0x6 */
203 /* Configure GPIO_140 as output */
204 MuxConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_5 + GPIO_DIRECTION_CONTROL);
205 *MuxConfReg &= (0xFFFFEFFF); /* Clear direction (output) for GPIO 140 */
208 * Configure GPIOs for battery charge & feedback
211 /* Configure MUXed pin. Mode 6: GPIO_35 */
212 MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF3);
213 *MuxConfReg &= 0xFFFFFFF1; /* Clear M_CLK_OUT */
214 *MuxConfReg |= 0x0000000C; /* Set M_CLK_OUT = 0x6 (GPIOs) */
216 /* Configure MUXed pin. Mode 6: GPIO_72,73,74 */
217 MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF5);
218 *MuxConfReg &= 0xFFFF1FFF; /* Clear D_DDR */
219 *MuxConfReg |= 0x0000C000; /* Set D_DDR = 0x6 (GPIOs) */
221 MuxConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_3 + GPIO_DIRECTION_CONTROL);
222 *MuxConfReg |= 0x00000100; /* Configure GPIO_72 as input */
223 *MuxConfReg &= 0xFFFFFDFF; /* Configure GPIO_73 as output */
226 * Allow battery charge
229 MuxConfReg = (volatile unsigned int *) ((unsigned int) OMAP730_GPIO_BASE_3 + GPIO_DATA_OUTPUT);
230 *MuxConfReg &= (0xFFFFFDFF); /* Clear GPIO_73 pin */
233 * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
234 * It is used as the Ethernet controller interrupt
236 MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF9);
237 *MuxConfReg &= 0x1FFFFFFF;
240 /******************************************************
241 Routine: peripheral_power_enable
242 Description: Enable the power for UART1
243 *******************************************************/
244 void peripheral_power_enable (void)
246 volatile unsigned int *MuxConfReg;
249 /* Set up pins used by UART */
251 /* Start UART clock (48MHz) */
252 MuxConfReg = (volatile unsigned int *) (PERSEUS_PCC_CONF_REG);
253 *MuxConfReg &= (0xFFFFFFF7);
254 *MuxConfReg |= (0x00000008);
256 /* Get the UART pin in mode0 */
257 MuxConfReg = (volatile unsigned int *) (PERSEUS2_IO_CONF3);
258 *MuxConfReg &= (0xFF1FFFFF);
259 *MuxConfReg &= (0xF1FFFFFF);
262 #ifdef CONFIG_CMD_NET
263 int board_eth_init(bd_t *bis)
266 #ifdef CONFIG_LAN91C96
267 rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);