board/ti/omap5_uevm/evm.c

   1 /*
   2  * (C) Copyright 2010
   3  * Texas Instruments Incorporated, <www.ti.com>
   4  * Aneesh V       <aneesh@ti.com>
   5  * Steve Sakoman  <steve@sakoman.com>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9 #include <common.h>
  10 #include <palmas.h>
  11 #include <asm/arch/sys_proto.h>
  12 #include <asm/arch/mmc_host_def.h>
  13 #include <tca642x.h>
  14
  15 #include "mux_data.h"
  16
  17 #if defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_XHCI_OMAP)
  18 #include <usb.h>
  19 #include <asm/gpio.h>
  20 #include <asm/arch/clock.h>
  21 #include <asm/arch/ehci.h>
  22 #include <asm/ehci-omap.h>
  23
  24 #define DIE_ID_REG_BASE     (OMAP54XX_L4_CORE_BASE + 0x2000)
  25 #define DIE_ID_REG_OFFSET       0x200
  26
  27 #endif
  28
  29 DECLARE_GLOBAL_DATA_PTR;
  30
  31 const struct omap_sysinfo sysinfo = {
  32         "Board: OMAP5432 uEVM\n"
  33 };
  34
  35 /**
  36  * @brief tca642x_init - uEVM default values for the GPIO expander
  37  * input reg, output reg, polarity reg, configuration reg
  38  */
  39 struct tca642x_bank_info tca642x_init[] = {
  40         { .input_reg = 0x00,
  41           .output_reg = 0x04,
  42           .polarity_reg = 0x00,
  43           .configuration_reg = 0x80 },
  44         { .input_reg = 0x00,
  45           .output_reg = 0x00,
  46           .polarity_reg = 0x00,
  47           .configuration_reg = 0xff },
  48         { .input_reg = 0x00,
  49           .output_reg = 0x00,
  50           .polarity_reg = 0x00,
  51           .configuration_reg = 0x40 },
  52 };
  53
  54 /**
  55  * @brief board_init
  56  *
  57  * @return 0
  58  */
  59 int board_init(void)
  60 {
  61         gpmc_init();
  62         gd->bd->bi_arch_number = MACH_TYPE_OMAP5_SEVM;
  63         gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
  64
  65         tca642x_set_inital_state(CONFIG_SYS_I2C_TCA642X_ADDR, tca642x_init);
  66
  67         return 0;
  68 }
  69
  70 int board_eth_init(bd_t *bis)
  71 {
  72         return 0;
  73 }
  74
  75 #if defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_XHCI_OMAP)
  76 static void enable_host_clocks(void)
  77 {
  78         int auxclk;
  79         int hs_clk_ctrl_val = (OPTFCLKEN_HSIC60M_P3_CLK |
  80                                 OPTFCLKEN_HSIC480M_P3_CLK |
  81                                 OPTFCLKEN_HSIC60M_P2_CLK |
  82                                 OPTFCLKEN_HSIC480M_P2_CLK |
  83                                 OPTFCLKEN_UTMI_P3_CLK | OPTFCLKEN_UTMI_P2_CLK);
  84
  85         /* Enable port 2 and 3 clocks*/
  86         setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val);
  87
  88         /* Enable port 2 and 3 usb host ports tll clocks*/
  89         setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
  90                         (OPTFCLKEN_USB_CH1_CLK_ENABLE | OPTFCLKEN_USB_CH2_CLK_ENABLE));
  91 #ifdef CONFIG_USB_XHCI_OMAP
  92         /* Enable the USB OTG Super speed clocks */
  93         setbits_le32((*prcm)->cm_l3init_usb_otg_ss_clkctrl,
  94                         (OPTFCLKEN_REFCLK960M | OTG_SS_CLKCTRL_MODULEMODE_HW));
  95 #endif
  96
  97         auxclk = readl((*prcm)->scrm_auxclk1);
  98         /* Request auxilary clock */
  99         auxclk |= AUXCLK_ENABLE_MASK;
 100         writel(auxclk, (*prcm)->scrm_auxclk1);
 101 }
 102 #endif
 103
 104 /**
 105  * @brief misc_init_r - Configure EVM board specific configurations
 106  * such as power configurations, ethernet initialization as phase2 of
 107  * boot sequence
 108  *
 109  * @return 0
 110  */
 111 int misc_init_r(void)
 112 {
 113 #ifdef CONFIG_PALMAS_POWER
 114         palmas_init_settings();
 115 #endif
 116
 117         return 0;
 118 }
 119
 120 void set_muxconf_regs_essential(void)
 121 {
 122         do_set_mux((*ctrl)->control_padconf_core_base,
 123                    core_padconf_array_essential,
 124                    sizeof(core_padconf_array_essential) /
 125                    sizeof(struct pad_conf_entry));
 126
 127         do_set_mux((*ctrl)->control_padconf_wkup_base,
 128                    wkup_padconf_array_essential,
 129                    sizeof(wkup_padconf_array_essential) /
 130                    sizeof(struct pad_conf_entry));
 131 }
 132
 133 void set_muxconf_regs_non_essential(void)
 134 {
 135         do_set_mux((*ctrl)->control_padconf_core_base,
 136                    core_padconf_array_non_essential,
 137                    sizeof(core_padconf_array_non_essential) /
 138                    sizeof(struct pad_conf_entry));
 139
 140         do_set_mux((*ctrl)->control_padconf_wkup_base,
 141                    wkup_padconf_array_non_essential,
 142                    sizeof(wkup_padconf_array_non_essential) /
 143                    sizeof(struct pad_conf_entry));
 144 }
 145
 146 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
 147 int board_mmc_init(bd_t *bis)
 148 {
 149         omap_mmc_init(0, 0, 0, -1, -1);
 150         omap_mmc_init(1, 0, 0, -1, -1);
 151         return 0;
 152 }
 153 #endif
 154
 155 #ifdef CONFIG_USB_EHCI
 156 static struct omap_usbhs_board_data usbhs_bdata = {
 157         .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
 158         .port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
 159         .port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
 160 };
 161
 162 int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 163 {
 164         int ret;
 165         int reg;
 166         uint8_t device_mac[6];
 167
 168         enable_host_clocks();
 169
 170         if (!getenv("usbethaddr")) {
 171                 reg = DIE_ID_REG_BASE + DIE_ID_REG_OFFSET;
 172
 173                 /*
 174                  * create a fake MAC address from the processor ID code.
 175                  * first byte is 0x02 to signify locally administered.
 176                  */
 177                 device_mac[0] = 0x02;
 178                 device_mac[1] = readl(reg + 0x10) & 0xff;
 179                 device_mac[2] = readl(reg + 0xC) & 0xff;
 180                 device_mac[3] = readl(reg + 0x8) & 0xff;
 181                 device_mac[4] = readl(reg) & 0xff;
 182                 device_mac[5] = (readl(reg) >> 8) & 0xff;
 183
 184                 eth_setenv_enetaddr("usbethaddr", device_mac);
 185         }
 186
 187         ret = omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
 188         if (ret < 0) {
 189                 puts("Failed to initialize ehci\n");
 190                 return ret;
 191         }
 192
 193         return 0;
 194 }
 195
 196 int ehci_hcd_stop(void)
 197 {
 198         int ret;
 199
 200         ret = omap_ehci_hcd_stop();
 201         return ret;
 202 }
 203
 204 void usb_hub_reset_devices(int port)
 205 {
 206         /* The LAN9730 needs to be reset after the port power has been set. */
 207         if (port == 3) {
 208                 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 0);
 209                 udelay(10);
 210                 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 1);
 211         }
 212 }
 213 #endif
 214
 215 #ifdef CONFIG_USB_XHCI_OMAP
 216 /**
 217  * @brief board_usb_init - Configure EVM board specific configurations
 218  * for the LDO's and clocks for the USB blocks.
 219  *
 220  * @return 0
 221  */
 222 int board_usb_init(void)
 223 {
 224         int ret;
 225 #ifdef CONFIG_PALMAS_USB_SS_PWR
 226         ret = palmas_enable_ss_ldo();
 227 #endif
 228
 229         enable_host_clocks();
 230
 231         return 0;
 232 }
 233 #endif