board/ti/omap5_uevm/evm.c

   1 /*
   2  * (C) Copyright 2010
   3  * Texas Instruments Incorporated, <www.ti.com>
   4  * Aneesh V       <aneesh@ti.com>
   5  * Steve Sakoman  <steve@sakoman.com>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9 #include <common.h>
  10 #include <palmas.h>
  11 #include <asm/arch/sys_proto.h>
  12 #include <asm/arch/mmc_host_def.h>
  13 #include <tca642x.h>
  14
  15 #include "mux_data.h"
  16
  17 #ifdef CONFIG_USB_EHCI
  18 #include <usb.h>
  19 #include <asm/arch/clock.h>
  20 #include <asm/arch/ehci.h>
  21 #include <asm/ehci-omap.h>
  22 #endif
  23
  24 DECLARE_GLOBAL_DATA_PTR;
  25
  26 const struct omap_sysinfo sysinfo = {
  27         "Board: OMAP5432 uEVM\n"
  28 };
  29
  30 /**
  31  * @brief tca642x_init - uEVM default values for the GPIO expander
  32  * input reg, output reg, polarity reg, configuration reg
  33  */
  34 struct tca642x_bank_info tca642x_init[] = {
  35         { .input_reg = 0x00,
  36           .output_reg = 0x04,
  37           .polarity_reg = 0x00,
  38           .configuration_reg = 0x80 },
  39         { .input_reg = 0x00,
  40           .output_reg = 0x00,
  41           .polarity_reg = 0x00,
  42           .configuration_reg = 0xff },
  43         { .input_reg = 0x00,
  44           .output_reg = 0x00,
  45           .polarity_reg = 0x00,
  46           .configuration_reg = 0x40 },
  47 };
  48
  49 /**
  50  * @brief board_init
  51  *
  52  * @return 0
  53  */
  54 int board_init(void)
  55 {
  56         gpmc_init();
  57         gd->bd->bi_arch_number = MACH_TYPE_OMAP5_SEVM;
  58         gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
  59
  60         tca642x_set_inital_state(CONFIG_SYS_I2C_TCA642X_ADDR, tca642x_init);
  61
  62         return 0;
  63 }
  64
  65 int board_eth_init(bd_t *bis)
  66 {
  67         return 0;
  68 }
  69
  70 /**
  71  * @brief misc_init_r - Configure EVM board specific configurations
  72  * such as power configurations, ethernet initialization as phase2 of
  73  * boot sequence
  74  *
  75  * @return 0
  76  */
  77 int misc_init_r(void)
  78 {
  79 #ifdef CONFIG_PALMAS_POWER
  80         palmas_init_settings();
  81 #endif
  82         return 0;
  83 }
  84
  85 void set_muxconf_regs_essential(void)
  86 {
  87         do_set_mux((*ctrl)->control_padconf_core_base,
  88                    core_padconf_array_essential,
  89                    sizeof(core_padconf_array_essential) /
  90                    sizeof(struct pad_conf_entry));
  91
  92         do_set_mux((*ctrl)->control_padconf_wkup_base,
  93                    wkup_padconf_array_essential,
  94                    sizeof(wkup_padconf_array_essential) /
  95                    sizeof(struct pad_conf_entry));
  96 }
  97
  98 void set_muxconf_regs_non_essential(void)
  99 {
 100         do_set_mux((*ctrl)->control_padconf_core_base,
 101                    core_padconf_array_non_essential,
 102                    sizeof(core_padconf_array_non_essential) /
 103                    sizeof(struct pad_conf_entry));
 104
 105         do_set_mux((*ctrl)->control_padconf_wkup_base,
 106                    wkup_padconf_array_non_essential,
 107                    sizeof(wkup_padconf_array_non_essential) /
 108                    sizeof(struct pad_conf_entry));
 109 }
 110
 111 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
 112 int board_mmc_init(bd_t *bis)
 113 {
 114         omap_mmc_init(0, 0, 0, -1, -1);
 115         omap_mmc_init(1, 0, 0, -1, -1);
 116         return 0;
 117 }
 118 #endif
 119
 120 #ifdef CONFIG_USB_EHCI
 121 static struct omap_usbhs_board_data usbhs_bdata = {
 122         .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
 123         .port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
 124         .port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
 125 };
 126
 127 static void enable_host_clocks(void)
 128 {
 129         int hs_clk_ctrl_val = (OPTFCLKEN_HSIC60M_P3_CLK |
 130                                 OPTFCLKEN_HSIC480M_P3_CLK |
 131                                 OPTFCLKEN_HSIC60M_P2_CLK |
 132                                 OPTFCLKEN_HSIC480M_P2_CLK |
 133                                 OPTFCLKEN_UTMI_P3_CLK | OPTFCLKEN_UTMI_P2_CLK);
 134
 135         /* Enable port 2 and 3 clocks*/
 136         setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val);
 137
 138         /* Enable port 2 and 3 usb host ports tll clocks*/
 139         setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
 140                         (OPTFCLKEN_USB_CH1_CLK_ENABLE | OPTFCLKEN_USB_CH2_CLK_ENABLE));
 141 }
 142
 143 int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 144 {
 145         int ret;
 146         int auxclk;
 147
 148         enable_host_clocks();
 149
 150         auxclk = readl((*prcm)->scrm_auxclk1);
 151         /* Request auxilary clock */
 152         auxclk |= AUXCLK_ENABLE_MASK;
 153         writel(auxclk, (*prcm)->scrm_auxclk1);
 154
 155         ret = omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
 156         if (ret < 0) {
 157                 puts("Failed to initialize ehci\n");
 158                 return ret;
 159         }
 160
 161         return 0;
 162 }
 163
 164 int ehci_hcd_stop(void)
 165 {
 166         int ret;
 167
 168         ret = omap_ehci_hcd_stop();
 169         return ret;
 170 }
 171 #endif