board/ti/omap5_uevm/evm.c

   1 /*
   2  * (C) Copyright 2010
   3  * Texas Instruments Incorporated, <www.ti.com>
   4  * Aneesh V       <aneesh@ti.com>
   5  * Steve Sakoman  <steve@sakoman.com>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9 #include <common.h>
  10 #include <palmas.h>
  11 #include <asm/arch/sys_proto.h>
  12 #include <asm/arch/mmc_host_def.h>
  13 #include <tca642x.h>
  14
  15 #include "mux_data.h"
  16
  17 #ifdef CONFIG_USB_EHCI
  18 #include <usb.h>
  19 #include <asm/arch/clock.h>
  20 #include <asm/arch/ehci.h>
  21 #include <asm/ehci-omap.h>
  22
  23 #define DIE_ID_REG_BASE     (OMAP54XX_L4_CORE_BASE + 0x2000)
  24 #define DIE_ID_REG_OFFSET       0x200
  25
  26 #endif
  27
  28 DECLARE_GLOBAL_DATA_PTR;
  29
  30 const struct omap_sysinfo sysinfo = {
  31         "Board: OMAP5432 uEVM\n"
  32 };
  33
  34 /**
  35  * @brief tca642x_init - uEVM default values for the GPIO expander
  36  * input reg, output reg, polarity reg, configuration reg
  37  */
  38 struct tca642x_bank_info tca642x_init[] = {
  39         { .input_reg = 0x00,
  40           .output_reg = 0x04,
  41           .polarity_reg = 0x00,
  42           .configuration_reg = 0x80 },
  43         { .input_reg = 0x00,
  44           .output_reg = 0x00,
  45           .polarity_reg = 0x00,
  46           .configuration_reg = 0xff },
  47         { .input_reg = 0x00,
  48           .output_reg = 0x00,
  49           .polarity_reg = 0x00,
  50           .configuration_reg = 0x40 },
  51 };
  52
  53 /**
  54  * @brief board_init
  55  *
  56  * @return 0
  57  */
  58 int board_init(void)
  59 {
  60         gpmc_init();
  61         gd->bd->bi_arch_number = MACH_TYPE_OMAP5_SEVM;
  62         gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
  63
  64         tca642x_set_inital_state(CONFIG_SYS_I2C_TCA642X_ADDR, tca642x_init);
  65
  66         return 0;
  67 }
  68
  69 int board_eth_init(bd_t *bis)
  70 {
  71         return 0;
  72 }
  73
  74 /**
  75  * @brief misc_init_r - Configure EVM board specific configurations
  76  * such as power configurations, ethernet initialization as phase2 of
  77  * boot sequence
  78  *
  79  * @return 0
  80  */
  81 int misc_init_r(void)
  82 {
  83 #ifdef CONFIG_PALMAS_POWER
  84         palmas_init_settings();
  85 #endif
  86         return 0;
  87 }
  88
  89 void set_muxconf_regs_essential(void)
  90 {
  91         do_set_mux((*ctrl)->control_padconf_core_base,
  92                    core_padconf_array_essential,
  93                    sizeof(core_padconf_array_essential) /
  94                    sizeof(struct pad_conf_entry));
  95
  96         do_set_mux((*ctrl)->control_padconf_wkup_base,
  97                    wkup_padconf_array_essential,
  98                    sizeof(wkup_padconf_array_essential) /
  99                    sizeof(struct pad_conf_entry));
 100 }
 101
 102 void set_muxconf_regs_non_essential(void)
 103 {
 104         do_set_mux((*ctrl)->control_padconf_core_base,
 105                    core_padconf_array_non_essential,
 106                    sizeof(core_padconf_array_non_essential) /
 107                    sizeof(struct pad_conf_entry));
 108
 109         do_set_mux((*ctrl)->control_padconf_wkup_base,
 110                    wkup_padconf_array_non_essential,
 111                    sizeof(wkup_padconf_array_non_essential) /
 112                    sizeof(struct pad_conf_entry));
 113 }
 114
 115 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
 116 int board_mmc_init(bd_t *bis)
 117 {
 118         omap_mmc_init(0, 0, 0, -1, -1);
 119         omap_mmc_init(1, 0, 0, -1, -1);
 120         return 0;
 121 }
 122 #endif
 123
 124 #ifdef CONFIG_USB_EHCI
 125 static struct omap_usbhs_board_data usbhs_bdata = {
 126         .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
 127         .port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
 128         .port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
 129 };
 130
 131 static void enable_host_clocks(void)
 132 {
 133         int hs_clk_ctrl_val = (OPTFCLKEN_HSIC60M_P3_CLK |
 134                                 OPTFCLKEN_HSIC480M_P3_CLK |
 135                                 OPTFCLKEN_HSIC60M_P2_CLK |
 136                                 OPTFCLKEN_HSIC480M_P2_CLK |
 137                                 OPTFCLKEN_UTMI_P3_CLK | OPTFCLKEN_UTMI_P2_CLK);
 138
 139         /* Enable port 2 and 3 clocks*/
 140         setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val);
 141
 142         /* Enable port 2 and 3 usb host ports tll clocks*/
 143         setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
 144                         (OPTFCLKEN_USB_CH1_CLK_ENABLE | OPTFCLKEN_USB_CH2_CLK_ENABLE));
 145 }
 146
 147 int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 148 {
 149         int ret;
 150         int auxclk;
 151         int reg;
 152         uint8_t device_mac[6];
 153
 154         enable_host_clocks();
 155
 156         if (!getenv("usbethaddr")) {
 157                 reg = DIE_ID_REG_BASE + DIE_ID_REG_OFFSET;
 158
 159                 /*
 160                  * create a fake MAC address from the processor ID code.
 161                  * first byte is 0x02 to signify locally administered.
 162                  */
 163                 device_mac[0] = 0x02;
 164                 device_mac[1] = readl(reg + 0x10) & 0xff;
 165                 device_mac[2] = readl(reg + 0xC) & 0xff;
 166                 device_mac[3] = readl(reg + 0x8) & 0xff;
 167                 device_mac[4] = readl(reg) & 0xff;
 168                 device_mac[5] = (readl(reg) >> 8) & 0xff;
 169
 170                 eth_setenv_enetaddr("usbethaddr", device_mac);
 171         }
 172
 173         auxclk = readl((*prcm)->scrm_auxclk1);
 174         /* Request auxilary clock */
 175         auxclk |= AUXCLK_ENABLE_MASK;
 176         writel(auxclk, (*prcm)->scrm_auxclk1);
 177
 178         ret = omap_ehci_hcd_init(&usbhs_bdata, hccr, hcor);
 179         if (ret < 0) {
 180                 puts("Failed to initialize ehci\n");
 181                 return ret;
 182         }
 183
 184         return 0;
 185 }
 186
 187 int ehci_hcd_stop(void)
 188 {
 189         int ret;
 190
 191         ret = omap_ehci_hcd_stop();
 192         return ret;
 193 }
 194 #endif