Merge branch 'master' of git://git.denx.de/u-boot-spi
[platform/kernel/u-boot.git] / board / ti / omap5_uevm / evm.c
1 /*
2  * (C) Copyright 2010
3  * Texas Instruments Incorporated, <www.ti.com>
4  * Aneesh V       <aneesh@ti.com>
5  * Steve Sakoman  <steve@sakoman.com>
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9 #include <common.h>
10 #include <palmas.h>
11 #include <asm/arch/omap.h>
12 #include <asm/arch/sys_proto.h>
13 #include <asm/arch/mmc_host_def.h>
14 #include <tca642x.h>
15 #include <usb.h>
16 #include <linux/usb/gadget.h>
17 #include <dwc3-uboot.h>
18 #include <dwc3-omap-uboot.h>
19 #include <ti-usb-phy-uboot.h>
20
21 #include "mux_data.h"
22
23 #if defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_XHCI_OMAP)
24 #include <sata.h>
25 #include <usb.h>
26 #include <asm/gpio.h>
27 #include <asm/arch/clock.h>
28 #include <asm/arch/ehci.h>
29 #include <asm/ehci-omap.h>
30 #include <asm/arch/sata.h>
31
32 #define DIE_ID_REG_BASE     (OMAP54XX_L4_CORE_BASE + 0x2000)
33 #define DIE_ID_REG_OFFSET       0x200
34
35 #endif
36
37 DECLARE_GLOBAL_DATA_PTR;
38
39 const struct omap_sysinfo sysinfo = {
40         "Board: OMAP5432 uEVM\n"
41 };
42
43 /**
44  * @brief tca642x_init - uEVM default values for the GPIO expander
45  * input reg, output reg, polarity reg, configuration reg
46  */
47 struct tca642x_bank_info tca642x_init[] = {
48         { .input_reg = 0x00,
49           .output_reg = 0x04,
50           .polarity_reg = 0x00,
51           .configuration_reg = 0x80 },
52         { .input_reg = 0x00,
53           .output_reg = 0x00,
54           .polarity_reg = 0x00,
55           .configuration_reg = 0xff },
56         { .input_reg = 0x00,
57           .output_reg = 0x00,
58           .polarity_reg = 0x00,
59           .configuration_reg = 0x40 },
60 };
61
62 #ifdef CONFIG_USB_DWC3
63 static struct dwc3_device usb_otg_ss = {
64         .maximum_speed = USB_SPEED_SUPER,
65         .base = OMAP5XX_USB_OTG_SS_BASE,
66         .tx_fifo_resize = false,
67         .index = 0,
68 };
69
70 static struct dwc3_omap_device usb_otg_ss_glue = {
71         .base = (void *)OMAP5XX_USB_OTG_SS_GLUE_BASE,
72         .utmi_mode = DWC3_OMAP_UTMI_MODE_SW,
73         .index = 0,
74 };
75
76 static struct ti_usb_phy_device usb_phy_device = {
77         .pll_ctrl_base = (void *)OMAP5XX_USB3_PHY_PLL_CTRL,
78         .usb2_phy_power = (void *)OMAP5XX_USB2_PHY_POWER,
79         .usb3_phy_power = (void *)OMAP5XX_USB3_PHY_POWER,
80         .index = 0,
81 };
82
83 int board_usb_init(int index, enum usb_init_type init)
84 {
85         if (index) {
86                 printf("Invalid Controller Index\n");
87                 return -EINVAL;
88         }
89
90         if (init == USB_INIT_DEVICE) {
91                 usb_otg_ss.dr_mode = USB_DR_MODE_PERIPHERAL;
92                 usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
93         } else {
94                 usb_otg_ss.dr_mode = USB_DR_MODE_HOST;
95                 usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_ID_GROUND;
96         }
97
98         enable_usb_clocks(index);
99         ti_usb_phy_uboot_init(&usb_phy_device);
100         dwc3_omap_uboot_init(&usb_otg_ss_glue);
101         dwc3_uboot_init(&usb_otg_ss);
102
103         return 0;
104 }
105
106 int board_usb_cleanup(int index, enum usb_init_type init)
107 {
108         if (index) {
109                 printf("Invalid Controller Index\n");
110                 return -EINVAL;
111         }
112
113         ti_usb_phy_uboot_exit(index);
114         dwc3_uboot_exit(index);
115         dwc3_omap_uboot_exit(index);
116         disable_usb_clocks(index);
117
118         return 0;
119 }
120
121 int usb_gadget_handle_interrupts(int index)
122 {
123         u32 status;
124
125         status = dwc3_omap_uboot_interrupt_status(index);
126         if (status)
127                 dwc3_uboot_handle_interrupt(index);
128
129         return 0;
130 }
131 #endif
132
133 /**
134  * @brief board_init
135  *
136  * @return 0
137  */
138 int board_init(void)
139 {
140         gpmc_init();
141         gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
142
143         tca642x_set_inital_state(CONFIG_SYS_I2C_TCA642X_ADDR, tca642x_init);
144
145         return 0;
146 }
147
148 int board_eth_init(bd_t *bis)
149 {
150         return 0;
151 }
152
153 #if defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_XHCI_OMAP)
154 static void enable_host_clocks(void)
155 {
156         int auxclk;
157         int hs_clk_ctrl_val = (OPTFCLKEN_HSIC60M_P3_CLK |
158                                 OPTFCLKEN_HSIC480M_P3_CLK |
159                                 OPTFCLKEN_HSIC60M_P2_CLK |
160                                 OPTFCLKEN_HSIC480M_P2_CLK |
161                                 OPTFCLKEN_UTMI_P3_CLK | OPTFCLKEN_UTMI_P2_CLK);
162
163         /* Enable port 2 and 3 clocks*/
164         setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val);
165
166         /* Enable port 2 and 3 usb host ports tll clocks*/
167         setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
168                         (OPTFCLKEN_USB_CH1_CLK_ENABLE | OPTFCLKEN_USB_CH2_CLK_ENABLE));
169 #ifdef CONFIG_USB_XHCI_OMAP
170         /* Enable the USB OTG Super speed clocks */
171         setbits_le32((*prcm)->cm_l3init_usb_otg_ss_clkctrl,
172                         (OPTFCLKEN_REFCLK960M | OTG_SS_CLKCTRL_MODULEMODE_HW));
173 #endif
174
175         auxclk = readl((*prcm)->scrm_auxclk1);
176         /* Request auxilary clock */
177         auxclk |= AUXCLK_ENABLE_MASK;
178         writel(auxclk, (*prcm)->scrm_auxclk1);
179 }
180 #endif
181
182 /**
183  * @brief misc_init_r - Configure EVM board specific configurations
184  * such as power configurations, ethernet initialization as phase2 of
185  * boot sequence
186  *
187  * @return 0
188  */
189 int misc_init_r(void)
190 {
191 #ifdef CONFIG_PALMAS_POWER
192         palmas_init_settings();
193 #endif
194
195         omap_die_id_usbethaddr();
196
197         return 0;
198 }
199
200 void set_muxconf_regs(void)
201 {
202         do_set_mux((*ctrl)->control_padconf_core_base,
203                    core_padconf_array_essential,
204                    sizeof(core_padconf_array_essential) /
205                    sizeof(struct pad_conf_entry));
206
207         do_set_mux((*ctrl)->control_padconf_wkup_base,
208                    wkup_padconf_array_essential,
209                    sizeof(wkup_padconf_array_essential) /
210                    sizeof(struct pad_conf_entry));
211 }
212
213 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
214 int board_mmc_init(bd_t *bis)
215 {
216         omap_mmc_init(0, 0, 0, -1, -1);
217         omap_mmc_init(1, 0, 0, -1, -1);
218         return 0;
219 }
220 #endif
221
222 #ifdef CONFIG_USB_EHCI
223 static struct omap_usbhs_board_data usbhs_bdata = {
224         .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
225         .port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
226         .port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
227 };
228
229 int ehci_hcd_init(int index, enum usb_init_type init,
230                 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
231 {
232         int ret;
233
234         enable_host_clocks();
235
236         ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
237         if (ret < 0) {
238                 puts("Failed to initialize ehci\n");
239                 return ret;
240         }
241
242         return 0;
243 }
244
245 int ehci_hcd_stop(void)
246 {
247         return omap_ehci_hcd_stop();
248 }
249
250 void usb_hub_reset_devices(int port)
251 {
252         /* The LAN9730 needs to be reset after the port power has been set. */
253         if (port == 3) {
254                 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 0);
255                 udelay(10);
256                 gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 1);
257         }
258 }
259 #endif
260
261 #ifdef CONFIG_USB_XHCI_OMAP
262 /**
263  * @brief board_usb_init - Configure EVM board specific configurations
264  * for the LDO's and clocks for the USB blocks.
265  *
266  * @return 0
267  */
268 int board_usb_init(int index, enum usb_init_type init)
269 {
270         int ret;
271 #ifdef CONFIG_PALMAS_USB_SS_PWR
272         ret = palmas_enable_ss_ldo();
273 #endif
274
275         enable_host_clocks();
276
277         return 0;
278 }
279 #endif