3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
7 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
10 * Texas Instruments, <www.ti.com>
11 * Kshitij Gupta <Kshitij@ti.com>
14 * Texas Instruments, <www.ti.com>
15 * Rishi Bhattacharya <rishi@ti.com>
17 * See file CREDITS for list of people who contributed to this
20 * This program is free software; you can redistribute it and/or
21 * modify it under the terms of the GNU General Public License as
22 * published by the Free Software Foundation; either version 2 of
23 * the License, or (at your option) any later version.
25 * This program is distributed in the hope that it will be useful,
26 * but WITHOUT ANY WARRANTY; without even the implied warranty of
27 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
28 * GNU General Public License for more details.
30 * You should have received a copy of the GNU General Public License
31 * along with this program; if not, write to the Free Software
32 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
38 #if defined(CONFIG_OMAP1610)
39 #include <./configs/omap1510.h>
42 DECLARE_GLOBAL_DATA_PTR;
44 void flash__init (void);
45 void ether__init (void);
46 void set_muxconf_regs (void);
47 void peripheral_power_enable (void);
49 #define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
51 static inline void delay (unsigned long loops)
53 __asm__ volatile ("1:\n"
55 "bne 1b":"=r" (loops):"0" (loops));
59 * Miscellaneous platform dependent initialisations
64 gd->bd->bi_arch_number = MACH_TYPE_OMAP_OSK;
66 /* adress of boot parameters */
67 gd->bd->bi_boot_params = 0x10000100;
69 /* Configure MUX settings */
71 peripheral_power_enable ();
73 /* this speeds up your boot a quite a bit. However to make it
74 * work, you need make sure your kernel startup flush bug is fixed.
84 /******************************
87 ******************************/
88 void flash__init (void)
90 #define EMIFS_GlB_Config_REG 0xfffecc0c
92 regval = *((volatile unsigned int *) EMIFS_GlB_Config_REG);
93 /* Turn off write protection for flash devices. */
94 regval = regval | 0x0001;
95 *((volatile unsigned int *) EMIFS_GlB_Config_REG) = regval;
97 /*************************************************************
99 Description: take the Ethernet controller out of reset and wait
100 for the EEPROM load to complete.
101 *************************************************************/
102 void ether__init (void)
104 #define ETH_CONTROL_REG 0x0480000b
107 *((volatile unsigned short *) 0xfffece08) = 0x03FF;
108 *((volatile unsigned short *) 0xfffb3824) = 0x8000;
109 *((volatile unsigned short *) 0xfffb3830) = 0x0000;
110 *((volatile unsigned short *) 0xfffb3834) = 0x0009;
111 *((volatile unsigned short *) 0xfffb3838) = 0x0009;
112 *((volatile unsigned short *) 0xfffb3818) = 0x0002;
113 *((volatile unsigned short *) 0xfffb382C) = 0x0048;
114 *((volatile unsigned short *) 0xfffb3824) = 0x8603;
116 for (i=0;i<2000;i++);
117 *((volatile unsigned short *) 0xfffb381C) = 0x6610;
119 for (i=0;i<10000;i++);
121 *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01;
127 /******************************
130 ******************************/
133 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
138 void dram_init_banksize(void)
140 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
141 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
144 /******************************************************
145 Routine: set_muxconf_regs
146 Description: Setting up the configuration Mux registers
147 specific to the hardware
148 *******************************************************/
149 void set_muxconf_regs (void)
151 volatile unsigned int *MuxConfReg;
152 /* set each registers to its reset value; */
154 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
155 /* setup for UART1 */
156 *MuxConfReg &= ~(0x02000000); /* bit 25 */
157 /* setup for UART2 */
158 *MuxConfReg &= ~(0x01000000); /* bit 24 */
159 /* Disable Uwire CS Hi-Z */
160 *MuxConfReg |= 0x08000000;
162 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_3);
163 *MuxConfReg = 0x00000000;
165 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_4);
166 *MuxConfReg = 0x00000000;
168 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_5);
169 *MuxConfReg = 0x00000000;
171 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_6);
172 /*setup mux for UART3 */
173 *MuxConfReg |= 0x00000001; /* bit3, 1, 0 (mux0 5,5,26) */
174 *MuxConfReg &= ~0x0000003e;
176 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_7);
177 *MuxConfReg = 0x00000000;
179 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_8);
180 /* Disable Uwire CS Hi-Z */
181 *MuxConfReg |= 0x00001200; /*bit 9 for CS0 12 for CS3 */
183 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_9);
184 /* Need to turn on bits 21 and 12 in FUNC_MUX_CTRL_9 so the */
185 /* hardware will actually use TX and RTS based on bit 25 in */
186 /* FUNC_MUX_CTRL_0. I told you this thing was screwy! */
187 *MuxConfReg |= 0x00201000;
189 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_A);
190 *MuxConfReg = 0x00000000;
192 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_B);
193 *MuxConfReg = 0x00000000;
195 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_C);
196 /* setup for UART2 */
197 /* Need to turn on bits 27 and 24 in FUNC_MUX_CTRL_C so the */
198 /* hardware will actually use TX and RTS based on bit 24 in */
199 /* FUNC_MUX_CTRL_0. */
200 *MuxConfReg |= 0x09000000;
202 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_D);
203 *MuxConfReg |= 0x00000020;
205 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_0);
206 *MuxConfReg = 0x00000000;
208 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_1);
209 *MuxConfReg = 0x00000000;
210 /* mux setup for SD/MMC driver */
212 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_2);
213 *MuxConfReg &= 0xFFFE0FFF;
215 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_3);
216 *MuxConfReg = 0x00000000;
218 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
219 /* bit 13 for MMC2 XOR_CLK */
220 *MuxConfReg &= ~(0x00002000);
221 /* bit 29 for UART 1 */
222 *MuxConfReg &= ~(0x00002000);
224 (volatile unsigned int *) ((unsigned int) FUNC_MUX_CTRL_0);
225 /* Configure for USB. Turn on VBUS_CTRL and VBUS_MODE. */
226 *MuxConfReg |= 0x000C0000;
228 (volatile unsigned int *) ((unsigned int)USB_TRANSCEIVER_CTRL);
229 *MuxConfReg &= ~(0x00000070);
230 *MuxConfReg &= ~(0x00000008);
231 *MuxConfReg |= 0x00000003;
232 *MuxConfReg |= 0x00000180;
234 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
235 /* bit 17, software controls VBUS */
236 *MuxConfReg &= ~(0x00020000);
237 /* Enable USB 48 and 12M clocks */
238 *MuxConfReg |= 0x00000200;
239 *MuxConfReg &= ~(0x00000180);
240 /*2.75V for MMCSDIO1 */
242 (volatile unsigned int *) ((unsigned int) VOLTAGE_CTRL_0);
243 *MuxConfReg = 0x00001FE7;
245 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_0);
246 *MuxConfReg = 0x00000000;
248 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_1);
249 *MuxConfReg = 0x00000000;
251 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
252 *MuxConfReg = 0x00000000;
254 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_3);
255 *MuxConfReg = 0x00000000;
257 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_4);
258 *MuxConfReg = 0x00000000;
260 (volatile unsigned int *) ((unsigned int) PULL_DWN_CTRL_4);
261 *MuxConfReg = 0x00000000;
262 /* Turn on UART2 48 MHZ clock */
264 (volatile unsigned int *) ((unsigned int) MOD_CONF_CTRL_0);
265 *MuxConfReg |= 0x40000000;
267 (volatile unsigned int *) ((unsigned int) USB_OTG_CTRL);
268 /* setup for USB VBus detection OMAP161x */
269 *MuxConfReg |= 0x00040000; /* bit 18 */
271 (volatile unsigned int *) ((unsigned int) PU_PD_SEL_2);
272 /* PullUps for SD/MMC driver */
273 *MuxConfReg |= ~(0xFFFE0FFF);
275 (volatile unsigned int *) ((unsigned int)COMP_MODE_CTRL_0);
276 *MuxConfReg = COMP_MODE_ENABLE;
279 /******************************************************
280 Routine: peripheral_power_enable
281 Description: Enable the power for UART1
282 *******************************************************/
283 void peripheral_power_enable (void)
285 #define UART1_48MHZ_ENABLE ((unsigned short)0x0200)
286 #define SW_CLOCK_REQUEST ((volatile unsigned short *)0xFFFE0834)
288 *SW_CLOCK_REQUEST |= UART1_48MHZ_ENABLE;
292 * Check Board Identity
297 int i = getenv_f("serial#", buf, sizeof(buf));
299 puts("Board: OSK5912");
310 #ifdef CONFIG_CMD_NET
311 int board_eth_init(bd_t *bis)
314 #ifdef CONFIG_LAN91C96
315 rc = lan91c96_initialize(0, CONFIG_LAN91C96_BASE);