board/ti/ks2_evm/board_k2hk.c

   1 /*
   2  * K2HK EVM : Board initialization
   3  *
   4  * (C) Copyright 2012-2014
   5  *     Texas Instruments Incorporated, <www.ti.com>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <common.h>
  11 #include <asm/arch/clock.h>
  12 #include <asm/arch/hardware.h>
  13 #include <asm/ti-common/keystone_net.h>
  14
  15 DECLARE_GLOBAL_DATA_PTR;
  16
  17 unsigned int external_clk[ext_clk_count] = {
  18         [sys_clk]       =       122880000,
  19         [alt_core_clk]  =       125000000,
  20         [pa_clk]        =       122880000,
  21         [tetris_clk]    =       125000000,
  22         [ddr3a_clk]     =       100000000,
  23         [ddr3b_clk]     =       100000000,
  24 };
  25
  26 static struct pll_init_data core_pll_config[NUM_SPDS] = {
  27         [SPD800]        = CORE_PLL_799,
  28         [SPD1000]       = CORE_PLL_999,
  29         [SPD1200]       = CORE_PLL_1200,
  30 };
  31
  32 s16 divn_val[16] = {
  33         0, 0, 1, 4, 23, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
  34 };
  35
  36 static struct pll_init_data tetris_pll_config[] = {
  37         [SPD800]        = TETRIS_PLL_800,
  38         [SPD1000]       = TETRIS_PLL_1000,
  39         [SPD1200]       = TETRIS_PLL_1200,
  40         [SPD1350]       = TETRIS_PLL_1350,
  41         [SPD1400]       = TETRIS_PLL_1400,
  42 };
  43
  44 static struct pll_init_data pa_pll_config =
  45         PASS_PLL_983;
  46
  47 struct pll_init_data *get_pll_init_data(int pll)
  48 {
  49         int speed;
  50         struct pll_init_data *data;
  51
  52         switch (pll) {
  53         case MAIN_PLL:
  54                 speed = get_max_dev_speed();
  55                 data = &core_pll_config[speed];
  56                 break;
  57         case TETRIS_PLL:
  58                 speed = get_max_arm_speed();
  59                 data = &tetris_pll_config[speed];
  60                 break;
  61         case PASS_PLL:
  62                 data = &pa_pll_config;
  63                 break;
  64         default:
  65                 data = NULL;
  66         }
  67
  68         return data;
  69 }
  70
  71 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
  72 struct eth_priv_t eth_priv_cfg[] = {
  73         {
  74                 .int_name       = "K2HK_EMAC",
  75                 .rx_flow        = 22,
  76                 .phy_addr       = 0,
  77                 .slave_port     = 1,
  78                 .sgmii_link_type = SGMII_LINK_MAC_PHY,
  79                 .phy_if          = PHY_INTERFACE_MODE_SGMII,
  80         },
  81         {
  82                 .int_name       = "K2HK_EMAC1",
  83                 .rx_flow        = 23,
  84                 .phy_addr       = 1,
  85                 .slave_port     = 2,
  86                 .sgmii_link_type = SGMII_LINK_MAC_PHY,
  87                 .phy_if          = PHY_INTERFACE_MODE_SGMII,
  88         },
  89         {
  90                 .int_name       = "K2HK_EMAC2",
  91                 .rx_flow        = 24,
  92                 .phy_addr       = 2,
  93                 .slave_port     = 3,
  94                 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
  95                 .phy_if          = PHY_INTERFACE_MODE_SGMII,
  96         },
  97         {
  98                 .int_name       = "K2HK_EMAC3",
  99                 .rx_flow        = 25,
 100                 .phy_addr       = 3,
 101                 .slave_port     = 4,
 102                 .sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
 103                 .phy_if          = PHY_INTERFACE_MODE_SGMII,
 104         },
 105 };
 106
 107 int get_num_eth_ports(void)
 108 {
 109         return sizeof(eth_priv_cfg) / sizeof(struct eth_priv_t);
 110 }
 111 #endif
 112
 113 #ifdef CONFIG_BOARD_EARLY_INIT_F
 114 int board_early_init_f(void)
 115 {
 116         init_plls();
 117
 118         return 0;
 119 }
 120 #endif
 121
 122 #ifdef CONFIG_SPL_BUILD
 123 void spl_init_keystone_plls(void)
 124 {
 125         init_plls();
 126 }
 127 #endif