2 * K2G EVM : Board initialization
5 * Texas Instruments Incorporated, <www.ti.com>
7 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/clock.h>
11 #include <asm/ti-common/keystone_net.h>
14 #define SYS_CLK 24000000
16 unsigned int external_clk[ext_clk_count] = {
19 [tetris_clk] = SYS_CLK,
20 [ddr3a_clk] = SYS_CLK,
24 static struct pll_init_data main_pll_config = {MAIN_PLL, 100, 1, 4};
25 static struct pll_init_data tetris_pll_config = {TETRIS_PLL, 100, 1, 4};
26 static struct pll_init_data uart_pll_config = {UART_PLL, 64, 1, 4};
27 static struct pll_init_data nss_pll_config = {NSS_PLL, 250, 3, 2};
28 static struct pll_init_data ddr3_pll_config = {DDR3A_PLL, 250, 3, 10};
30 struct pll_init_data *get_pll_init_data(int pll)
32 struct pll_init_data *data = NULL;
36 data = &main_pll_config;
39 data = &tetris_pll_config;
42 data = &nss_pll_config;
45 data = &uart_pll_config;
48 data = &ddr3_pll_config;
58 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
61 #ifdef CONFIG_BOARD_EARLY_INIT_F
62 int board_early_init_f(void)
72 #ifdef CONFIG_SPL_BUILD
73 void spl_init_keystone_plls(void)
79 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
80 struct eth_priv_t eth_priv_cfg[] = {
82 .int_name = "K2G_EMAC",
86 .sgmii_link_type = SGMII_LINK_MAC_PHY,
87 .phy_if = PHY_INTERFACE_MODE_RGMII,
91 int get_num_eth_ports(void)
93 return sizeof(eth_priv_cfg) / sizeof(struct eth_priv_t);