2 * (C) Copyright 2004-2008
3 * Texas Instruments, <www.ti.com>
6 * Manikandan Pillai <mani.pillai@ti.com>
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
12 * See file CREDITS for list of people who contributed to this
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 #include <asm/arch/mem.h>
34 #include <asm/arch/mux.h>
35 #include <asm/arch/sys_proto.h>
36 #include <asm/arch/gpio.h>
38 #include <asm/mach-types.h>
41 #define OMAP3EVM_GPIO_ETH_RST_GEN1 64
42 #define OMAP3EVM_GPIO_ETH_RST_GEN2 7
44 DECLARE_GLOBAL_DATA_PTR;
46 static u32 omap3_evm_version;
48 u32 get_omap3_evm_rev(void)
50 return omap3_evm_version;
53 static void omap3_evm_get_revision(void)
55 #if defined(CONFIG_CMD_NET)
57 * Board revision can be ascertained only by identifying
58 * the Ethernet chipset.
62 /* Ethernet PHY ID is stored at ID_REV register */
63 smsc_id = readl(CONFIG_SMC911X_BASE + 0x50) & 0xFFFF0000;
64 printf("Read back SMSC id 0x%x\n", smsc_id);
67 /* SMSC9115 chipset */
69 omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
71 /* SMSC 9220 chipset */
74 omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
77 #if defined(CONFIG_STATIC_BOARD_REV)
79 * Look for static defintion of the board revision
81 omap3_evm_version = CONFIG_STATIC_BOARD_REV;
84 * Fallback to the default above.
86 omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
88 #endif /* CONFIG_CMD_NET */
91 #ifdef CONFIG_USB_OMAP3
93 * MUSB port on OMAP3EVM Rev >= E requires extvbus programming.
95 u8 omap3_evm_need_extvbus(void)
99 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
107 * Routine: board_init
108 * Description: Early hardware init.
112 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
113 /* board id for Linux */
114 gd->bd->bi_arch_number = MACH_TYPE_OMAP3EVM;
115 /* boot param addr */
116 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
122 * Routine: misc_init_r
123 * Description: Init ethernet (done here so udelay works)
125 int misc_init_r(void)
128 #ifdef CONFIG_DRIVER_OMAP34XX_I2C
129 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
132 #if defined(CONFIG_CMD_NET)
135 omap3_evm_get_revision();
137 #if defined(CONFIG_CMD_NET)
146 * Routine: set_muxconf_regs
147 * Description: Setting up the configuration Mux registers specific to the
148 * hardware. Many pins need to be moved from protect to primary
151 void set_muxconf_regs(void)
156 #ifdef CONFIG_CMD_NET
158 * Routine: setup_net_chip
159 * Description: Setting up the configuration GPMC registers specific to the
162 static void setup_net_chip(void)
164 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
166 /* Configure GPMC registers */
167 writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1);
168 writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2);
169 writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3);
170 writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4);
171 writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5);
172 writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6);
173 writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7);
175 /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
176 writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
177 /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
178 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
179 /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
180 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
181 &ctrl_base->gpmc_nadv_ale);
185 * Reset the ethernet chip.
187 static void reset_net_chip(void)
192 if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) {
193 rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN1;
195 rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN2;
198 ret = omap_request_gpio(rst_gpio);
200 printf("Unable to get GPIO %d\n", rst_gpio);
204 /* Configure as output */
205 omap_set_gpio_direction(rst_gpio, 0);
207 /* Send a pulse on the GPIO pin */
208 omap_set_gpio_dataout(rst_gpio, 1);
210 omap_set_gpio_dataout(rst_gpio, 0);
212 omap_set_gpio_dataout(rst_gpio, 1);
215 int board_eth_init(bd_t *bis)
218 #ifdef CONFIG_SMC911X
219 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
223 #endif /* CONFIG_CMD_NET */