2 * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arcregs.h>
13 DECLARE_GLOBAL_DATA_PTR;
15 int board_mmc_init(bd_t *bis)
17 struct dwmci_host *host = NULL;
19 host = malloc(sizeof(struct dwmci_host));
21 printf("dwmci_host malloc fail!\n");
25 memset(host, 0, sizeof(struct dwmci_host));
26 host->name = "Synopsys Mobile storage";
27 host->ioaddr = (void *)ARC_DWMMC_BASE;
30 host->bus_hz = 50000000;
32 add_dwmci(host, host->bus_hz / 2, 400000);
37 #define AXS_MB_CREG 0xE0011000
39 int board_early_init_f(void)
41 if (readl((void __iomem *)AXS_MB_CREG + 0x234) & (1 << 28))
42 gd->board_type = AXS_MB_V3;
44 gd->board_type = AXS_MB_V2;
49 #ifdef CONFIG_ISA_ARCV2
51 void board_jump_and_run(ulong entry, int zero, int arch, uint params)
53 void (*kernel_entry)(int zero, int arch, uint params);
55 kernel_entry = (void (*)(int, int, uint))entry;
57 smp_set_core_boot_addr(entry, -1);
59 kernel_entry(zero, arch, params);
62 #define RESET_VECTOR_ADDR 0x0
64 void smp_set_core_boot_addr(unsigned long addr, int corenr)
66 /* All cores have reset vector pointing to 0 */
67 writel(addr, (void __iomem *)RESET_VECTOR_ADDR);
69 /* Make sure other cores see written value in memory */
73 void smp_kick_all_cpus(void)
76 #define AXC003_CREG_CPU_START 0xF0001400
77 /* Bits positions in CPU start CREG */
79 #define BITS_START_MODE 4
80 #define BITS_CORE_SEL 9
83 * In axs103 v1.1 START bits semantics has changed quite a bit.
84 * We used to have a generic START bit for all cores selected by CORE_SEL mask.
85 * But now we don't touch CORE_SEL at all because we have a dedicated START bit
87 * bit 0: Core 0 (master)
88 * bit 1: Core 1 (slave)
90 #define BITS_START_CORE1 1
92 #define ARCVER_HS38_3_0 0x53
94 int core_family = read_aux_reg(ARC_AUX_IDENTITY) & 0xff;
95 int cmd = readl((void __iomem *)AXC003_CREG_CPU_START);
97 if (core_family < ARCVER_HS38_3_0) {
98 cmd |= (1 << BITS_CORE_SEL) | (1 << BITS_START);
99 cmd &= ~(1 << BITS_START_MODE);
101 cmd |= (1 << BITS_START_CORE1);
103 writel(cmd, (void __iomem *)AXC003_CREG_CPU_START);