6 #include <asm/arch/clock.h>
7 #include <asm/arch/gpio.h>
9 int sunxi_gmac_initialize(bd_t *bis)
12 struct sunxi_ccm_reg *const ccm =
13 (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
15 /* Set up clock gating */
16 setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC);
19 setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII |
20 CCM_GMAC_CTRL_GPIT_RGMII);
22 /* Configure pin mux settings for GMAC */
23 for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(16); pin++) {
24 /* skip unused pins in RGMII mode */
25 if (pin == SUNXI_GPA(9) || pin == SUNXI_GPA(14))
27 sunxi_gpio_set_cfgpin(pin, SUN7I_GPA0_GMAC);
28 sunxi_gpio_set_drv(pin, 3);
31 return designware_initialize(SUNXI_GMAC_BASE, PHY_INTERFACE_MODE_RGMII);