4 prompt "Sunxi SoC Variant"
7 bool "sun4i (Allwinner A10)"
12 bool "sun5i (Allwinner A13)"
17 bool "sun6i (Allwinner A31)"
22 bool "sun7i (Allwinner A20)"
24 select CPU_V7_HAS_NONSEC
25 select CPU_V7_HAS_VIRT
27 select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
30 bool "sun8i (Allwinner A23)"
37 int "sunxi dram clock speed"
38 default 312 if MACH_SUN6I || MACH_SUN8I
39 default 360 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
41 Set the dram clock speed, valid range 240 - 480, must be a multiple
44 if MACH_SUN5I || MACH_SUN7I
46 int "sunxi mbus clock speed"
49 Set the mbus clock speed. The maximum on sun5i hardware is 300MHz.
54 int "sunxi dram zq value"
55 default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I
56 default 127 if MACH_SUN7I
58 Set the dram zq value.
60 if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
62 int "sunxi dram emr1 value"
63 default 0 if MACH_SUN4I
64 default 4 if MACH_SUN5I || MACH_SUN7I
66 Set the dram controller emr1 value.
69 int "sunxi dram odt_en value"
72 Set the dram controller odt_en parameter. This can be used to
73 enable/disable the ODT feature.
76 hex "sunxi dram tpr3 value"
79 Set the dram controller tpr3 parameter. This parameter configures
80 the delay on the command lane and also phase shifts, which are
81 applied for sampling incoming read data. The default value 0
82 means that no phase/delay adjustments are necessary. Properly
83 configuring this parameter increases reliability at high DRAM
86 config DRAM_DQS_GATING_DELAY
87 hex "sunxi dram dqs_gating_delay value"
90 Set the dram controller dqs_gating_delay parmeter. Each byte
91 encodes the DQS gating delay for each byte lane. The delay
92 granularity is 1/4 cycle. For example, the value 0x05060606
93 means that the delay is 5 quarter-cycles for one lane (1.25
94 cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
95 The default value 0 means autodetection. The results of hardware
96 autodetection are not very reliable and depend on the chip
97 temperature (sometimes producing different results on cold start
98 and warm reboot). But the accuracy of hardware autodetection
99 is usually good enough, unless running at really high DRAM
100 clocks speeds (up to 600MHz). If unsure, keep as 0.
103 prompt "sunxi dram timings"
104 default DRAM_TIMINGS_VENDOR_MAGIC
106 Select the timings of the DDR3 chips.
108 config DRAM_TIMINGS_VENDOR_MAGIC
109 bool "Magic vendor timings from Android"
111 The same DRAM timings as in the Allwinner boot0 bootloader.
113 config DRAM_TIMINGS_DDR3_1066F_1333H
114 bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
116 Use the timings of the standard JEDEC DDR3-1066F speed bin for
117 DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
118 for DRAM_CLK > 533MHz. This covers the majority of DDR3 chips
119 used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
120 or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
121 that down binning to DDR3-1066F is supported (because DDR3-1066F
122 uses a bit faster timings than DDR3-1333H).
124 config DRAM_TIMINGS_DDR3_800E_1066G_1333J
125 bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
127 Use the timings of the slowest possible JEDEC speed bin for the
128 selected DRAM_CLK. Depending on the DRAM_CLK value, it may be
129 DDR3-800E, DDR3-1066G or DDR3-1333J.
135 config SYS_CONFIG_NAME
136 default "sun4i" if MACH_SUN4I
137 default "sun5i" if MACH_SUN5I
138 default "sun6i" if MACH_SUN6I
139 default "sun7i" if MACH_SUN7I
140 default "sun8i" if MACH_SUN8I
149 bool "SPL/FEL mode support"
154 bool "UART0 on MicroSD breakout board"
158 Repurpose the SD card slot for getting access to the UART0 serial
159 console. Primarily useful only for low level u-boot debugging on
160 tablets, where normal UART0 is difficult to access and requires
161 device disassembly and/or soldering. As the SD card can't be used
162 at the same time, the system can be only booted in the FEL mode.
163 Only enable this if you really know what you are doing.
166 string "Default fdtfile env setting for this board"
168 config OLD_SUNXI_KERNEL_COMPAT
169 boolean "Enable workarounds for booting old kernels"
172 Set this to enable various workarounds for old kernels, this results in
173 sub-optimal settings for newer kernels, only enable if needed.
176 string "Card detect pin for mmc0"
179 Set the card detect pin for mmc0, leave empty to not use cd. This
180 takes a string in the format understood by sunxi_name_to_gpio, e.g.
181 PH1 for pin 1 of port H.
184 string "Card detect pin for mmc1"
187 See MMC0_CD_PIN help text.
190 string "Card detect pin for mmc2"
193 See MMC0_CD_PIN help text.
196 string "Card detect pin for mmc3"
199 See MMC0_CD_PIN help text.
201 config MMC_SUNXI_SLOT_EXTRA
202 int "mmc extra slot number"
205 sunxi builds always enable mmc0, some boards also have a second sdcard
206 slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
210 string "Vbus enable pin for usb0 (otg)"
213 Set the Vbus enable pin for usb0 (otg). This takes a string in the
214 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
217 string "Vbus enable pin for usb1 (ehci0)"
218 default "PH6" if MACH_SUN4I || MACH_SUN7I
219 default "PH27" if MACH_SUN6I
221 Set the Vbus enable pin for usb1 (ehci0, usb0 is the otg). This takes
222 a string in the format understood by sunxi_name_to_gpio, e.g.
223 PH1 for pin 1 of port H.
226 string "Vbus enable pin for usb2 (ehci1)"
227 default "PH3" if MACH_SUN4I || MACH_SUN7I
228 default "PH24" if MACH_SUN6I
230 See USB1_VBUS_PIN help text.
233 boolean "Enable graphical uboot console on HDMI, LCD or VGA"
236 Say Y here to add support for using a cfb console on the HDMI, LCD
237 or VGA output found on most sunxi devices. See doc/README.video for
238 info on how to select the video output and mode.
241 boolean "HDMI output support"
242 depends on VIDEO && !MACH_SUN8I
245 Say Y here to add support for outputting video over HDMI.
248 boolean "VGA output support"
249 depends on VIDEO && (MACH_SUN4I || MACH_SUN7I)
252 Say Y here to add support for outputting video over VGA.
254 config VIDEO_VGA_VIA_LCD
255 boolean "VGA via LCD controller support"
256 depends on VIDEO && (MACH_SUN5I || MACH_SUN6I || MACH_SUN8I)
259 Say Y here to add support for external DACs connected to the parallel
260 LCD interface driving a VGA connector, such as found on the
263 config VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH
264 boolean "Force sync active high for VGA via LCD controller support"
265 depends on VIDEO_VGA_VIA_LCD
268 Say Y here if you've a board which uses opendrain drivers for the vga
269 hsync and vsync signals. Opendrain drivers cannot generate steep enough
270 positive edges for a stable video output, so on boards with opendrain
271 drivers the sync signals must always be active high.
273 config VIDEO_VGA_EXTERNAL_DAC_EN
274 string "LCD panel power enable pin"
275 depends on VIDEO_VGA_VIA_LCD
278 Set the enable pin for the external VGA DAC. This takes a string in the
279 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
281 config VIDEO_LCD_MODE
282 string "LCD panel timing details"
286 LCD panel timing details string, leave empty if there is no LCD panel.
287 This is in drivers/video/videomodes.c: video_get_params() format, e.g.
288 x:800,y:480,depth:18,pclk_khz:33000,le:16,ri:209,up:22,lo:22,hs:30,vs:1,sync:0,vmode:0
290 config VIDEO_LCD_DCLK_PHASE
291 int "LCD panel display clock phase"
295 Select LCD panel display clock phase shift, range 0-3.
297 config VIDEO_LCD_POWER
298 string "LCD panel power enable pin"
302 Set the power enable pin for the LCD panel. This takes a string in the
303 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
305 config VIDEO_LCD_BL_EN
306 string "LCD panel backlight enable pin"
310 Set the backlight enable pin for the LCD panel. This takes a string in the
311 the format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of
314 config VIDEO_LCD_BL_PWM
315 string "LCD panel backlight pwm pin"
319 Set the backlight pwm pin for the LCD panel. This takes a string in the
320 format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
322 config VIDEO_LCD_BL_PWM_ACTIVE_LOW
323 bool "LCD panel backlight pwm is inverted"
327 Set this if the backlight pwm output is active low.
330 # Note only one of these may be selected at a time! But hidden choices are
331 # not supported by Kconfig
332 config VIDEO_LCD_IF_PARALLEL
335 config VIDEO_LCD_IF_LVDS
340 prompt "LCD panel support"
343 Select which type of LCD panel to support.
345 config VIDEO_LCD_PANEL_PARALLEL
346 bool "Generic parallel interface LCD panel"
347 select VIDEO_LCD_IF_PARALLEL
349 config VIDEO_LCD_PANEL_LVDS
350 bool "Generic lvds interface LCD panel"
351 select VIDEO_LCD_IF_LVDS
353 config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
354 bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
355 select VIDEO_LCD_SSD2828
356 select VIDEO_LCD_IF_PARALLEL
358 7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
360 config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
361 bool "Hitachi tx18d42vm LCD panel"
362 select VIDEO_LCD_HITACHI_TX18D42VM
363 select VIDEO_LCD_IF_LVDS
365 7.85" 1024x768 Hitachi tx18d42vm LCD panel support
370 config USB_MUSB_SUNXI
371 bool "Enable sunxi OTG / DRC USB controller in host mode"
374 Say y here to enable support for the sunxi OTG / DRC USB controller
375 used on almost all sunxi boards. Note currently u-boot can only have
376 one usb host controller enabled at a time, so enabling this on boards
377 which also use the ehci host controller will result in build errors.
380 boolean "Enable USB keyboard support"
383 Say Y here to add support for using a USB keyboard (typically used
384 in combination with a graphical console).
387 int "GMAC Transmit Clock Delay Chain"
390 Set the GMAC Transmit Clock Delay Chain value.