1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
11 #include <generic-phy.h>
19 #include <asm/arch/stm32.h>
20 #include <power/regulator.h>
22 /* SYSCFG registers */
23 #define SYSCFG_BOOTR 0x00
24 #define SYSCFG_PMCSETR 0x04
25 #define SYSCFG_IOCTRLSETR 0x18
26 #define SYSCFG_ICNR 0x1C
27 #define SYSCFG_CMPCR 0x20
28 #define SYSCFG_CMPENSETR 0x24
29 #define SYSCFG_PMCCLRR 0x44
31 #define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
32 #define SYSCFG_BOOTR_BOOTPD_SHIFT 4
34 #define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
35 #define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
36 #define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
37 #define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
38 #define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
40 #define SYSCFG_CMPCR_SW_CTRL BIT(1)
41 #define SYSCFG_CMPCR_READY BIT(8)
43 #define SYSCFG_CMPENSETR_MPU_EN BIT(0)
45 #define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
46 #define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
48 #define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
50 #define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
51 #define SYSCFG_PMCSETR_ETH_SEL_GMII_MII (0 << 21)
52 #define SYSCFG_PMCSETR_ETH_SEL_RGMII (1 << 21)
53 #define SYSCFG_PMCSETR_ETH_SEL_RMII (4 << 21)
56 * Get a global data pointer
58 DECLARE_GLOBAL_DATA_PTR;
60 #define USB_WARNING_LOW_THRESHOLD_UV 660000
61 #define USB_START_LOW_THRESHOLD_UV 1230000
62 #define USB_START_HIGH_THRESHOLD_UV 2100000
70 const char *fdt_compat;
73 if (IS_ENABLED(CONFIG_STM32MP1_TRUSTED))
78 printf("Board: stm32mp1 in %s mode", mode);
79 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
81 if (fdt_compat && fdt_compat_len)
82 printf(" (%s)", fdt_compat);
85 ret = uclass_get_device_by_driver(UCLASS_MISC,
86 DM_GET_DRIVER(stm32mp_bsec),
90 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
93 printf("Board: MB%04x Var%d Rev.%c-%02d\n",
96 ((otp >> 8) & 0xF) - 1 + 'A',
103 static void board_key_check(void)
105 #if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
107 struct gpio_desc gpio;
108 enum forced_boot_mode boot_mode = BOOT_NORMAL;
110 node = ofnode_path("/config");
111 if (!ofnode_valid(node)) {
112 debug("%s: no /config node?\n", __func__);
115 #ifdef CONFIG_FASTBOOT
116 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
117 &gpio, GPIOD_IS_IN)) {
118 debug("%s: could not find a /config/st,fastboot-gpios\n",
121 if (dm_gpio_get_value(&gpio)) {
122 puts("Fastboot key pressed, ");
123 boot_mode = BOOT_FASTBOOT;
126 dm_gpio_free(NULL, &gpio);
129 #ifdef CONFIG_CMD_STM32PROG
130 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
131 &gpio, GPIOD_IS_IN)) {
132 debug("%s: could not find a /config/st,stm32prog-gpios\n",
135 if (dm_gpio_get_value(&gpio)) {
136 puts("STM32Programmer key pressed, ");
137 boot_mode = BOOT_STM32PROG;
139 dm_gpio_free(NULL, &gpio);
143 if (boot_mode != BOOT_NORMAL) {
144 puts("entering download mode...\n");
145 clrsetbits_le32(TAMP_BOOT_CONTEXT,
146 TAMP_BOOT_FORCED_MASK,
152 #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
154 int g_dnl_board_usb_cable_connected(void)
156 struct udevice *dwc2_udc_otg;
159 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
160 DM_GET_DRIVER(dwc2_udc_otg),
163 debug("dwc2_udc_otg init failed\n");
165 return dwc2_udc_B_session_valid(dwc2_udc_otg);
167 #endif /* CONFIG_USB_GADGET */
169 static int get_led(struct udevice **dev, char *led_string)
174 led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
176 pr_debug("%s: could not find %s config string\n",
177 __func__, led_string);
180 ret = led_get_by_label(led_name, dev);
182 debug("%s: get=%d\n", __func__, ret);
189 static int setup_led(enum led_state_t cmd)
194 ret = get_led(&dev, "u-boot,boot-led");
198 ret = led_set_state(dev, cmd);
202 static int board_check_usb_power(void)
204 struct ofnode_phandle_args adc_args;
210 int ret, uV, adc_count;
213 node = ofnode_path("/config");
214 if (!ofnode_valid(node)) {
215 debug("%s: no /config node?\n", __func__);
220 * Retrieve the ADC channels devices and get measurement
223 adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
224 "#io-channel-cells");
226 if (adc_count == -ENOENT)
229 pr_err("%s: can't find adc channel (%d)\n", __func__,
235 for (i = 0; i < adc_count; i++) {
236 if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
237 "#io-channel-cells", 0, i,
239 pr_debug("%s: can't find /config/st,adc_usb_pd\n",
244 ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
248 pr_err("%s: Can't get adc device(%d)\n", __func__,
253 ret = adc_channel_single_shot(adc->name, adc_args.args[0],
256 pr_err("%s: single shot failed for %s[%d]!\n",
257 __func__, adc->name, adc_args.args[0]);
261 if (!adc_raw_to_uV(adc, raw, &uV)) {
264 pr_debug("%s: %s[%02d] = %u, %d uV\n", __func__,
265 adc->name, adc_args.args[0], raw, uV);
267 pr_err("%s: Can't get uV value for %s[%d]\n",
268 __func__, adc->name, adc_args.args[0]);
273 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
274 * board is plugged on an USB-C 3A power supply and boot process can
277 if (max_uV > USB_START_LOW_THRESHOLD_UV &&
278 max_uV < USB_START_HIGH_THRESHOLD_UV)
281 /* Display warning message and make u-boot,error-led blinking */
282 pr_err("\n*******************************************\n");
284 if (max_uV < USB_WARNING_LOW_THRESHOLD_UV) {
285 pr_err("* WARNING 500mA power supply detected *\n");
288 pr_err("* WARNING 1.5A power supply detected *\n");
292 pr_err("* Current too low, use a 3A power supply! *\n");
293 pr_err("*******************************************\n\n");
295 ret = get_led(&led, "u-boot,error-led");
299 for (i = 0; i < nb_blink * 2; i++) {
300 led_set_state(led, LEDST_TOGGLE);
303 led_set_state(led, LEDST_ON);
308 static void sysconf_init(void)
310 #ifndef CONFIG_STM32MP1_TRUSTED
312 #ifdef CONFIG_DM_REGULATOR
313 struct udevice *pwr_dev;
314 struct udevice *pwr_reg;
321 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
323 /* interconnect update : select master using the port 1 */
326 /* today information is hardcoded in U-Boot */
327 writel(BIT(9), syscfg + SYSCFG_ICNR);
329 /* disable Pull-Down for boot pin connected to VDD */
330 bootr = readl(syscfg + SYSCFG_BOOTR);
331 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
332 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
333 writel(bootr, syscfg + SYSCFG_BOOTR);
335 #ifdef CONFIG_DM_REGULATOR
336 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
337 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
338 * The customer will have to disable this for low frequencies
339 * or if AFMUX is selected but the function not used, typically for
340 * TRACE. Otherwise, impact on power consumption.
343 * enabling High Speed mode while VDD>2.7V
344 * with the OTP product_below_2v5 (OTP 18, BIT 13)
345 * erroneously set to 1 can damage the IC!
346 * => U-Boot set the register only if VDD < 2.7V (in DT)
347 * but this value need to be consistent with board design
349 ret = syscon_get_by_driver_data(STM32MP_SYSCON_PWR, &pwr_dev);
351 ret = uclass_get_device_by_driver(UCLASS_MISC,
352 DM_GET_DRIVER(stm32mp_bsec),
355 pr_err("Can't find stm32mp_bsec driver\n");
359 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
363 /* get VDD = pwr-supply */
364 ret = device_get_supply_regulator(pwr_dev, "pwr-supply",
367 /* check if VDD is Low Voltage */
369 if (regulator_get_value(pwr_reg) < 2700000) {
370 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
371 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
372 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
373 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
374 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
375 syscfg + SYSCFG_IOCTRLSETR);
378 pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
381 pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
384 debug("VDD unknown");
389 /* activate automatic I/O compensation
390 * warning: need to ensure CSI enabled and ready in clock driver
392 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
394 while (!(readl(syscfg + SYSCFG_CMPCR) & SYSCFG_CMPCR_READY))
396 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
400 /* board dependent setup after realloc */
405 /* address of boot parameters */
406 gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
408 /* probe all PINCTRL for hog */
409 for (uclass_first_device(UCLASS_PINCTRL, &dev);
411 uclass_next_device(&dev)) {
412 pr_debug("probe pincontrol = %s\n", dev->name);
419 if (IS_ENABLED(CONFIG_LED))
425 int board_late_init(void)
427 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
428 const void *fdt_compat;
431 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
433 if (fdt_compat && fdt_compat_len) {
434 if (strncmp(fdt_compat, "st,", 3) != 0)
435 env_set("board_name", fdt_compat);
437 env_set("board_name", fdt_compat + 3);
441 /* for DK1/DK2 boards */
442 board_check_usb_power();
447 void board_quiesce_devices(void)
449 setup_led(LEDST_OFF);