1 // SPDX-License-Identifier: GPL-2.0+
3 * Board functions for Siemens CORVUS (AT91SAM9G45) based board
4 * (C) Copyright 2013 Siemens AG
7 * U-Boot file: board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
8 * (C) Copyright 2007-2008
9 * Stelian Pop <stelian@popies.net>
10 * Lead Tech Design <www.leadtechdesign.com>
18 #include <asm/arch/at91sam9g45_matrix.h>
19 #include <asm/arch/at91sam9_smc.h>
20 #include <asm/arch/at91_common.h>
21 #include <asm/arch/at91_rstc.h>
22 #include <asm/arch/atmel_serial.h>
23 #include <asm/arch/gpio.h>
25 #include <asm/arch/clk.h>
26 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
34 #ifdef CONFIG_USB_GADGET_ATMEL_USBA
35 #include <asm/arch/atmel_usba_udc.h>
38 DECLARE_GLOBAL_DATA_PTR;
40 static void corvus_request_gpio(void)
42 gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand ena");
43 gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand rdy");
44 gpio_request(AT91_PIN_PD7, "d0");
45 gpio_request(AT91_PIN_PD8, "d1");
46 gpio_request(AT91_PIN_PA12, "d2");
47 gpio_request(AT91_PIN_PA13, "d3");
48 gpio_request(AT91_PIN_PA15, "d4");
49 gpio_request(AT91_PIN_PB7, "recovery button");
50 gpio_request(AT91_PIN_PD1, "USB0");
51 gpio_request(AT91_PIN_PD3, "USB1");
52 gpio_request(AT91_PIN_PB18, "SPICS1");
53 gpio_request(AT91_PIN_PB3, "SPICS0");
54 gpio_request(CONFIG_RED_LED, "red led");
55 gpio_request(CONFIG_GREEN_LED, "green led");
58 static void corvus_nand_hw_init(void)
60 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
61 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
65 csa = readl(&matrix->ebicsa);
66 csa |= AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA;
67 writel(csa, &matrix->ebicsa);
69 /* Configure SMC CS3 for NAND/SmartMedia */
70 writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
71 AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
73 writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) |
74 AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4),
76 writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
78 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
79 AT91_SMC_MODE_EXNW_DISABLE |
80 #ifdef CONFIG_SYS_NAND_DBW_16
81 AT91_SMC_MODE_DBW_16 |
82 #else /* CONFIG_SYS_NAND_DBW_8 */
85 AT91_SMC_MODE_TDF_CYCLE(3),
88 at91_periph_clk_enable(ATMEL_ID_PIOC);
89 at91_periph_clk_enable(ATMEL_ID_PIOA);
91 /* Enable NandFlash */
92 at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
93 at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
96 #if defined(CONFIG_SPL_BUILD)
100 void spl_board_init(void)
102 corvus_request_gpio();
104 * For on the sam9m10g45ek board, the chip wm9711 stay in the test
105 * mode, so it need do some action to exit mode.
107 at91_set_gpio_output(AT91_PIN_PD7, 0);
108 at91_set_gpio_output(AT91_PIN_PD8, 0);
109 at91_set_pio_pullup(AT91_PIO_PORTD, 7, 1);
110 at91_set_pio_pullup(AT91_PIO_PORTD, 8, 1);
111 at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1);
112 at91_set_pio_pullup(AT91_PIO_PORTA, 13, 1);
113 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
115 corvus_nand_hw_init();
117 /* Configure recovery button PINs */
118 at91_set_gpio_input(AT91_PIN_PB7, 1);
120 /* check if button is pressed */
121 if (at91_get_gpio_value(AT91_PIN_PB7) == 0) {
124 debug("Recovery button pressed\n");
125 boot_device = spl_boot_device();
126 switch (boot_device) {
127 #ifdef CONFIG_SPL_NAND_SUPPORT
128 case BOOT_DEVICE_NAND:
130 spl_nand_erase_one(0, 0);
137 #include <asm/arch/atmel_mpddrc.h>
138 static void ddr2_conf(struct atmel_mpddrc_config *ddr2)
140 ddr2->md = (ATMEL_MPDDRC_MD_DBW_16_BITS | ATMEL_MPDDRC_MD_DDR2_SDRAM);
142 ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
143 ATMEL_MPDDRC_CR_NR_ROW_14 |
144 ATMEL_MPDDRC_CR_DIC_DS |
145 ATMEL_MPDDRC_CR_DQMS_SHARED |
146 ATMEL_MPDDRC_CR_CAS_DDR_CAS3);
149 ddr2->tpr0 = (6 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET |/* 6*7.5 = 45 ns */
150 2 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET |/* 2*7.5 = 15 ns */
151 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | /* 2*7.5 = 15 ns */
152 8 << ATMEL_MPDDRC_TPR0_TRC_OFFSET | /* 8*7.5 = 75 ns */
153 2 << ATMEL_MPDDRC_TPR0_TRP_OFFSET | /* 2*7.5 = 15 ns */
154 1 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET | /* 1*7.5= 7.5 ns*/
155 1 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET | /* 1 clk cycle */
156 2 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET); /* 2 clk cycles */
158 ddr2->tpr1 = (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET | /* 2*7.5 = 15 ns */
159 200 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET |
160 16 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET |
161 14 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET);
163 ddr2->tpr2 = (1 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET |
164 0 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET |
165 7 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET |
166 2 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET);
171 struct atmel_mpddrc_config ddr2;
175 at91_system_clk_enable(AT91_PMC_DDR);
177 /* DDRAM2 Controller initialize */
178 ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2);
182 #ifdef CONFIG_CMD_USB
183 static void taurus_usb_hw_init(void)
185 at91_periph_clk_enable(ATMEL_ID_PIODE);
187 at91_set_gpio_output(AT91_PIN_PD1, 0);
188 at91_set_gpio_output(AT91_PIN_PD3, 0);
193 static void corvus_macb_hw_init(void)
196 at91_periph_clk_enable(ATMEL_ID_EMAC);
199 * Disable pull-up on:
200 * RXDV (PA15) => PHY normal mode (not Test mode)
201 * ERX0 (PA12) => PHY ADDR0
202 * ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0
204 * PHY has internal pull-down
206 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
207 at91_set_pio_pullup(AT91_PIO_PORTA, 12, 0);
208 at91_set_pio_pullup(AT91_PIO_PORTA, 13, 0);
212 /* Re-enable pull-up */
213 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
214 at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1);
215 at91_set_pio_pullup(AT91_PIO_PORTA, 13, 1);
222 int board_early_init_f(void)
224 at91_seriald_hw_init();
225 corvus_request_gpio();
229 #ifdef CONFIG_USB_GADGET_ATMEL_USBA
230 /* from ./arch/arm/mach-at91/armv7/sama5d3_devices.c */
231 void at91_udp_hw_init(void)
233 /* Enable UPLL clock */
234 at91_upll_clk_enable();
236 /* Enable UDPHS clock */
237 at91_periph_clk_enable(ATMEL_ID_UDPHS);
243 /* address of boot parameters */
244 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
246 /* we have to request the gpios again after relocation */
247 corvus_request_gpio();
248 #ifdef CONFIG_CMD_NAND
249 corvus_nand_hw_init();
251 #ifdef CONFIG_ATMEL_SPI
252 at91_spi0_hw_init(1 << 4);
255 corvus_macb_hw_init();
257 #ifdef CONFIG_CMD_USB
258 taurus_usb_hw_init();
260 #ifdef CONFIG_USB_GADGET_ATMEL_USBA
262 usba_udc_probe(&pdata);
269 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
270 CONFIG_SYS_SDRAM_SIZE);
274 #ifndef CONFIG_DM_ETH
275 int board_eth_init(bd_t *bis)
279 rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC, 0x00);
285 /* SPI chip select control */
286 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
288 return bus == 0 && cs < 2;
291 void spi_cs_activate(struct spi_slave *slave)
295 at91_set_gpio_output(AT91_PIN_PB18, 0);
299 at91_set_gpio_output(AT91_PIN_PB3, 0);
304 void spi_cs_deactivate(struct spi_slave *slave)
308 at91_set_gpio_output(AT91_PIN_PB18, 1);
312 at91_set_gpio_output(AT91_PIN_PB3, 1);
317 static struct atmel_serial_platdata at91sam9260_serial_plat = {
318 .base_addr = ATMEL_BASE_DBGU,
321 U_BOOT_DEVICE(at91sam9260_serial) = {
322 .name = "serial_atmel",
323 .platdata = &at91sam9260_serial_plat,