1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2010 Samsung Electronics
4 * Minkyu Kang <mk7.kang@samsung.com>
5 * Kyungmin Park <kyungmin.park@samsung.com>
15 #include <asm/arch/adc.h>
16 #include <asm/arch/pinmux.h>
17 #include <asm/arch/watchdog.h>
19 #include <linux/delay.h>
20 #include <power/pmic.h>
22 #include <usb/dwc2_udc.h>
23 #include <asm/arch/cpu.h>
24 #include <power/max8998_pmic.h>
26 #include <samsung/misc.h>
27 #include <usb_mass_storage.h>
28 #include <asm/mach-types.h>
30 DECLARE_GLOBAL_DATA_PTR;
32 unsigned int board_rev;
33 static int init_pmic_lcd(void);
35 u32 get_board_rev(void)
40 int exynos_power_init(void)
42 return init_pmic_lcd();
45 static int get_hwrev(void)
47 return board_rev & 0xFF;
50 static unsigned short get_adc_value(int channel)
52 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
53 unsigned short ret = 0;
55 unsigned int loop = 0;
57 writel(channel & 0xF, &adc->adcmux);
58 writel((1 << 14) | (49 << 6), &adc->adccon);
59 writel(1000 & 0xffff, &adc->adcdly);
60 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
62 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
67 reg = readl(&adc->adccon);
68 } while (!(reg & (1 << 15)) && (loop++ < 1000));
70 ret = readl(&adc->adcdat0) & 0xFFF;
75 static int adc_power_control(int on)
81 ret = pmic_get("max8998-pmic", &dev);
83 puts("Failed to get MAX8998!\n");
87 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
93 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
95 puts("MAX8998 LDO setting error\n");
102 static unsigned int get_hw_revision(void)
104 int hwrev, mode0, mode1;
106 adc_power_control(1);
108 mode0 = get_adc_value(1); /* HWREV_MODE0 */
109 mode1 = get_adc_value(2); /* HWREV_MODE1 */
112 * XXX Always set the default hwrev as the latest board
113 * ADC = (voltage) / 3.3 * 4096
117 #define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
118 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
119 hwrev = 0x0; /* 0.01V 0.01V */
120 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
121 hwrev = 0x1; /* 610mV 0.01V */
122 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
123 hwrev = 0x2; /* 1.16V 0.01V */
124 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
125 hwrev = 0x3; /* 1.79V 0.01V */
128 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
130 adc_power_control(0);
135 static void check_hw_revision(void)
139 hwrev = get_hw_revision();
144 #ifdef CONFIG_USB_GADGET
145 static int s5pc210_phy_control(int on)
151 ret = pmic_get("max8998-pmic", &dev);
153 puts("Failed to get MAX8998!\n");
158 reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
159 reg |= MAX8998_SAFEOUT1;
160 ret |= pmic_reg_write(dev,
161 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
163 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
165 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
167 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
169 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
172 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
173 reg &= ~MAX8998_LDO8;
174 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
176 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
177 reg &= ~MAX8998_LDO3;
178 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
180 reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
181 reg &= ~MAX8998_SAFEOUT1;
182 ret |= pmic_reg_write(dev,
183 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
187 puts("MAX8998 LDO setting error!\n");
194 struct dwc2_plat_otg_data s5pc210_otg_data = {
195 .phy_control = s5pc210_phy_control,
196 .regs_phy = EXYNOS4_USBPHY_BASE,
197 .regs_otg = EXYNOS4_USBOTG_BASE,
198 .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
199 .usb_flags = PHY0_SLEEP,
203 int board_usb_init(int index, enum usb_init_type init)
205 debug("USB_udc_probe\n");
206 return dwc2_udc_probe(&s5pc210_otg_data);
209 int exynos_early_init_f(void)
216 static int init_pmic_lcd(void)
222 ret = pmic_get("max8998-pmic", &dev);
224 puts("Failed to get MAX8998 for init_pmic_lcd()!\n");
229 val = 0x02; /* (1800 - 1600) / 100; */
230 ret |= pmic_reg_write(dev, MAX8998_REG_LDO7, val);
233 val = 0xe; /* (3000 - 1600) / 100; */
234 ret |= pmic_reg_write(dev, MAX8998_REG_LDO17, val);
236 /* Disable unneeded regulators */
239 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
240 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
243 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, val);
246 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
247 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
250 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, val);
253 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
254 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
257 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF3, val);
260 puts("LCD pmic initialisation error!\n");
267 void exynos_cfg_lcd_gpio(void)
269 unsigned int i, f3_end = 4;
271 for (i = 0; i < 8; i++) {
272 /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
273 gpio_cfg_pin(EXYNOS4_GPIO_F00 + i, S5P_GPIO_FUNC(2));
274 gpio_cfg_pin(EXYNOS4_GPIO_F10 + i, S5P_GPIO_FUNC(2));
275 gpio_cfg_pin(EXYNOS4_GPIO_F20 + i, S5P_GPIO_FUNC(2));
276 /* pull-up/down disable */
277 gpio_set_pull(EXYNOS4_GPIO_F00 + i, S5P_GPIO_PULL_NONE);
278 gpio_set_pull(EXYNOS4_GPIO_F10 + i, S5P_GPIO_PULL_NONE);
279 gpio_set_pull(EXYNOS4_GPIO_F20 + i, S5P_GPIO_PULL_NONE);
281 /* drive strength to max (24bit) */
282 gpio_set_drv(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_4X);
283 gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
284 gpio_set_drv(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_4X);
285 gpio_set_rate(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_SLOW);
286 gpio_set_drv(EXYNOS4_GPIO_F20 + i, S5P_GPIO_DRV_4X);
287 gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
290 for (i = EXYNOS4_GPIO_F30; i < (EXYNOS4_GPIO_F30 + f3_end); i++) {
291 /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
292 gpio_cfg_pin(i, S5P_GPIO_FUNC(2));
293 /* pull-up/down disable */
294 gpio_set_pull(i, S5P_GPIO_PULL_NONE);
295 /* drive strength to max (24bit) */
296 gpio_set_drv(i, S5P_GPIO_DRV_4X);
297 gpio_set_rate(i, S5P_GPIO_DRV_SLOW);
300 /* gpio pad configuration for LCD reset. */
301 gpio_request(EXYNOS4_GPIO_Y45, "lcd_reset");
302 gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT);
310 void exynos_reset_lcd(void)
312 gpio_set_value(EXYNOS4_GPIO_Y45, 1);
314 gpio_set_value(EXYNOS4_GPIO_Y45, 0);
316 gpio_set_value(EXYNOS4_GPIO_Y45, 1);
320 void exynos_lcd_power_on(void)
326 ret = pmic_get("max8998-pmic", &dev);
328 puts("Failed to get MAX8998!\n");
332 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF3);
333 reg |= MAX8998_LDO17;
334 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF3, reg);
336 puts("MAX8998 LDO setting error\n");
340 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
342 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
344 puts("MAX8998 LDO setting error\n");
349 void exynos_cfg_ldo(void)
354 void exynos_enable_ldo(unsigned int onoff)
356 ld9040_enable_ldo(onoff);
359 int exynos_init(void)
361 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
363 switch (get_hwrev()) {
366 * Set the low to enable LDO_EN
367 * But when you use the test board for eMMC booting
368 * you should set it HIGH since it removes the inverter
370 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
371 gpio_request(EXYNOS4_GPIO_E36, "ldo_en");
372 gpio_direction_output(EXYNOS4_GPIO_E36, 0);
376 * Default reset state is High and there's no inverter
377 * But set it as HIGH to ensure
379 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
380 gpio_request(EXYNOS4_GPIO_E13, "massmemory_en");
381 gpio_direction_output(EXYNOS4_GPIO_E13, 1);
386 printf("HW Revision:\t0x%x\n", board_rev);
392 void exynos_lcd_misc_init(vidinfo_t *vid)
395 get_tizen_logo_info(vid);
399 vid->pclk_name = 1; /* MPLL */
402 env_set("lcdinfo", "lcd=ld9040");