2 * Copyright (C) 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 * Kyungmin Park <kyungmin.park@samsung.com>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #include <asm/arch/adc.h>
28 #include <asm/arch/gpio.h>
29 #include <asm/arch/mmc.h>
30 #include <asm/arch/pinmux.h>
32 #include <usb/s3c_udc.h>
33 #include <asm/arch/cpu.h>
34 #include <max8998_pmic.h>
36 DECLARE_GLOBAL_DATA_PTR;
38 struct exynos4_gpio_part1 *gpio1;
39 struct exynos4_gpio_part2 *gpio2;
40 unsigned int board_rev;
42 u32 get_board_rev(void)
47 static int get_hwrev(void)
49 return board_rev & 0xFF;
52 static void check_hw_revision(void);
56 gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
57 gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
59 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
60 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
62 #if defined(CONFIG_PMIC)
67 printf("HW Revision:\t0x%x\n", board_rev);
74 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
75 get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
80 void dram_init_banksize(void)
82 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
83 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
84 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
85 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
88 static unsigned short get_adc_value(int channel)
90 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
91 unsigned short ret = 0;
93 unsigned int loop = 0;
95 writel(channel & 0xF, &adc->adcmux);
96 writel((1 << 14) | (49 << 6), &adc->adccon);
97 writel(1000 & 0xffff, &adc->adcdly);
98 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
100 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
105 reg = readl(&adc->adccon);
106 } while (!(reg & (1 << 15)) && (loop++ < 1000));
108 ret = readl(&adc->adcdat0) & 0xFFF;
113 static int adc_power_control(int on)
116 struct pmic *p = get_pmic();
121 ret = pmic_set_output(p,
128 static unsigned int get_hw_revision(void)
130 int hwrev, mode0, mode1;
132 adc_power_control(1);
134 mode0 = get_adc_value(1); /* HWREV_MODE0 */
135 mode1 = get_adc_value(2); /* HWREV_MODE1 */
138 * XXX Always set the default hwrev as the latest board
139 * ADC = (voltage) / 3.3 * 4096
143 #define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
144 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
145 hwrev = 0x0; /* 0.01V 0.01V */
146 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
147 hwrev = 0x1; /* 610mV 0.01V */
148 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
149 hwrev = 0x2; /* 1.16V 0.01V */
150 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
151 hwrev = 0x3; /* 1.79V 0.01V */
154 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
156 adc_power_control(0);
161 static void check_hw_revision(void)
165 hwrev = get_hw_revision();
170 #ifdef CONFIG_DISPLAY_BOARDINFO
173 puts("Board:\tUniversal C210\n");
178 #ifdef CONFIG_GENERIC_MMC
179 int board_mmc_init(bd_t *bis)
183 switch (get_hwrev()) {
186 * Set the low to enable LDO_EN
187 * But when you use the test board for eMMC booting
188 * you should set it HIGH since it removes the inverter
190 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
191 s5p_gpio_direction_output(&gpio1->e3, 6, 0);
195 * Default reset state is High and there's no inverter
196 * But set it as HIGH to ensure
198 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
199 s5p_gpio_direction_output(&gpio1->e1, 3, 1);
205 * mmc0 : eMMC (8-bit buswidth)
206 * mmc2 : SD card (4-bit buswidth)
208 err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
210 debug("SDMMC0 not configured\n");
212 err = s5p_mmc_init(0, 8);
215 s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
216 s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
219 * Check the T-flash detect pin
220 * GPX3[4] T-flash detect pin
222 if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
223 err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
225 debug("SDMMC2 not configured\n");
227 err = s5p_mmc_init(2, 4);
235 #ifdef CONFIG_USB_GADGET
236 static int s5pc210_phy_control(int on)
239 struct pmic *p = get_pmic();
245 ret |= pmic_set_output(p,
246 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
247 MAX8998_SAFEOUT1, LDO_ON);
248 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
249 MAX8998_LDO3, LDO_ON);
250 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
251 MAX8998_LDO8, LDO_ON);
254 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
255 MAX8998_LDO8, LDO_OFF);
256 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
257 MAX8998_LDO3, LDO_OFF);
258 ret |= pmic_set_output(p,
259 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
260 MAX8998_SAFEOUT1, LDO_OFF);
264 puts("MAX8998 LDO setting error!\n");
271 struct s3c_plat_otg_data s5pc210_otg_data = {
272 .phy_control = s5pc210_phy_control,
273 .regs_phy = EXYNOS4_USBPHY_BASE,
274 .regs_otg = EXYNOS4_USBOTG_BASE,
275 .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
276 .usb_flags = PHY0_SLEEP,