2 * Copyright (C) 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 * Kyungmin Park <kyungmin.park@samsung.com>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #include <asm/arch/adc.h>
28 #include <asm/arch/gpio.h>
29 #include <asm/arch/mmc.h>
30 #include <power/pmic.h>
31 #include <usb/s3c_udc.h>
32 #include <asm/arch/cpu.h>
33 #include <power/max8998_pmic.h>
35 DECLARE_GLOBAL_DATA_PTR;
37 struct exynos4_gpio_part1 *gpio1;
38 struct exynos4_gpio_part2 *gpio2;
39 unsigned int board_rev;
41 u32 get_board_rev(void)
46 static int get_hwrev(void)
48 return board_rev & 0xFF;
51 static void check_hw_revision(void);
55 gpio1 = (struct exynos4_gpio_part1 *) EXYNOS4_GPIO_PART1_BASE;
56 gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE;
58 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
59 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
62 printf("HW Revision:\t0x%x\n", board_rev);
67 int power_init_board(void)
71 ret = pmic_init(I2C_5);
80 gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) +
81 get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
86 void dram_init_banksize(void)
88 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
89 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
90 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
91 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
94 static unsigned short get_adc_value(int channel)
96 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
97 unsigned short ret = 0;
99 unsigned int loop = 0;
101 writel(channel & 0xF, &adc->adcmux);
102 writel((1 << 14) | (49 << 6), &adc->adccon);
103 writel(1000 & 0xffff, &adc->adcdly);
104 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
106 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
111 reg = readl(&adc->adccon);
112 } while (!(reg & (1 << 15)) && (loop++ < 1000));
114 ret = readl(&adc->adcdat0) & 0xFFF;
119 static int adc_power_control(int on)
122 struct pmic *p = pmic_get("MAX8998_PMIC");
129 ret = pmic_set_output(p,
136 static unsigned int get_hw_revision(void)
138 int hwrev, mode0, mode1;
140 adc_power_control(1);
142 mode0 = get_adc_value(1); /* HWREV_MODE0 */
143 mode1 = get_adc_value(2); /* HWREV_MODE1 */
146 * XXX Always set the default hwrev as the latest board
147 * ADC = (voltage) / 3.3 * 4096
151 #define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
152 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
153 hwrev = 0x0; /* 0.01V 0.01V */
154 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
155 hwrev = 0x1; /* 610mV 0.01V */
156 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
157 hwrev = 0x2; /* 1.16V 0.01V */
158 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
159 hwrev = 0x3; /* 1.79V 0.01V */
162 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
164 adc_power_control(0);
169 static void check_hw_revision(void)
173 hwrev = get_hw_revision();
178 #ifdef CONFIG_DISPLAY_BOARDINFO
181 puts("Board:\tUniversal C210\n");
186 #ifdef CONFIG_GENERIC_MMC
187 int board_mmc_init(bd_t *bis)
191 switch (get_hwrev()) {
194 * Set the low to enable LDO_EN
195 * But when you use the test board for eMMC booting
196 * you should set it HIGH since it removes the inverter
198 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
199 s5p_gpio_direction_output(&gpio1->e3, 6, 0);
203 * Default reset state is High and there's no inverter
204 * But set it as HIGH to ensure
206 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
207 s5p_gpio_direction_output(&gpio1->e1, 3, 1);
213 * SDR 8-bit@48MHz at MMC0
214 * GPK0[0] SD_0_CLK(2)
215 * GPK0[1] SD_0_CMD(2)
216 * GPK0[2] SD_0_CDn -> Not used
217 * GPK0[3:6] SD_0_DATA[0:3](2)
218 * GPK1[3:6] SD_0_DATA[0:3](3)
220 * DDR 4-bit@26MHz at MMC4
221 * GPK0[0] SD_4_CLK(3)
222 * GPK0[1] SD_4_CMD(3)
223 * GPK0[2] SD_4_CDn -> Not used
224 * GPK0[3:6] SD_4_DATA[0:3](3)
225 * GPK1[3:6] SD_4_DATA[4:7](4)
227 for (i = 0; i < 7; i++) {
230 /* GPK0[0:6] special function 2 */
231 s5p_gpio_cfg_pin(&gpio2->k0, i, 0x2);
232 /* GPK0[0:6] pull disable */
233 s5p_gpio_set_pull(&gpio2->k0, i, GPIO_PULL_NONE);
234 /* GPK0[0:6] drv 4x */
235 s5p_gpio_set_drv(&gpio2->k0, i, GPIO_DRV_4X);
238 for (i = 3; i < 7; i++) {
239 /* GPK1[3:6] special function 3 */
240 s5p_gpio_cfg_pin(&gpio2->k1, i, 0x3);
241 /* GPK1[3:6] pull disable */
242 s5p_gpio_set_pull(&gpio2->k1, i, GPIO_PULL_NONE);
243 /* GPK1[3:6] drv 4x */
244 s5p_gpio_set_drv(&gpio2->k1, i, GPIO_DRV_4X);
248 s5p_gpio_cfg_pin(&gpio2->x3, 4, 0xf);
249 s5p_gpio_set_pull(&gpio2->x3, 4, GPIO_PULL_UP);
253 * mmc0 : eMMC (8-bit buswidth)
254 * mmc2 : SD card (4-bit buswidth)
256 err = s5p_mmc_init(0, 8);
259 * Check the T-flash detect pin
260 * GPX3[4] T-flash detect pin
262 if (!s5p_gpio_get_value(&gpio2->x3, 4)) {
265 * GPK2[0] SD_2_CLK(2)
266 * GPK2[1] SD_2_CMD(2)
267 * GPK2[2] SD_2_CDn -> Not used
268 * GPK2[3:6] SD_2_DATA[0:3](2)
270 for (i = 0; i < 7; i++) {
273 /* GPK2[0:6] special function 2 */
274 s5p_gpio_cfg_pin(&gpio2->k2, i, 0x2);
275 /* GPK2[0:6] pull disable */
276 s5p_gpio_set_pull(&gpio2->k2, i, GPIO_PULL_NONE);
277 /* GPK2[0:6] drv 4x */
278 s5p_gpio_set_drv(&gpio2->k2, i, GPIO_DRV_4X);
280 err = s5p_mmc_init(2, 4);
288 #ifdef CONFIG_USB_GADGET
289 static int s5pc210_phy_control(int on)
292 struct pmic *p = pmic_get("MAX8998_PMIC");
300 ret |= pmic_set_output(p,
301 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
302 MAX8998_SAFEOUT1, LDO_ON);
303 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
304 MAX8998_LDO3, LDO_ON);
305 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
306 MAX8998_LDO8, LDO_ON);
309 ret |= pmic_set_output(p, MAX8998_REG_ONOFF2,
310 MAX8998_LDO8, LDO_OFF);
311 ret |= pmic_set_output(p, MAX8998_REG_ONOFF1,
312 MAX8998_LDO3, LDO_OFF);
313 ret |= pmic_set_output(p,
314 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
315 MAX8998_SAFEOUT1, LDO_OFF);
319 puts("MAX8998 LDO setting error!\n");
326 struct s3c_plat_otg_data s5pc210_otg_data = {
327 .phy_control = s5pc210_phy_control,
328 .regs_phy = EXYNOS4_USBPHY_BASE,
329 .regs_otg = EXYNOS4_USBOTG_BASE,
330 .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
331 .usb_flags = PHY0_SLEEP,