2 * Copyright (C) 2013 Samsung Electronics
4 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/board.h>
14 #include <asm/arch/cpu.h>
15 #include <asm/arch/gpio.h>
16 #include <asm/arch/pinmux.h>
17 #include <asm/arch/dp_info.h>
19 DECLARE_GLOBAL_DATA_PTR;
21 #ifdef CONFIG_USB_EHCI_EXYNOS
22 static int board_usb_vbus_init(void)
24 struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *)
25 samsung_get_base_gpio_part1();
27 /* Enable VBUS power switch */
28 s5p_gpio_direction_output(&gpio1->x2, 6, 1);
30 /* VBUS turn ON time */
39 #ifdef CONFIG_USB_EHCI_EXYNOS
40 board_usb_vbus_init();
46 void cfg_lcd_gpio(void)
48 struct exynos5_gpio_part1 *gpio1 =
49 (struct exynos5_gpio_part1 *)samsung_get_base_gpio_part1();
52 s5p_gpio_cfg_pin(&gpio1->b2, 0, GPIO_OUTPUT);
53 s5p_gpio_set_value(&gpio1->b2, 0, 1);
56 s5p_gpio_cfg_pin(&gpio1->x1, 5, GPIO_OUTPUT);
57 s5p_gpio_set_value(&gpio1->x1, 5, 1);
59 /* Set Hotplug detect for DP */
60 s5p_gpio_cfg_pin(&gpio1->x0, 7, GPIO_FUNC(0x3));
63 vidinfo_t panel_info = {
69 .vl_clkp = CONFIG_SYS_LOW,
70 .vl_hsp = CONFIG_SYS_LOW,
71 .vl_vsp = CONFIG_SYS_LOW,
72 .vl_dp = CONFIG_SYS_LOW,
73 .vl_bpix = 4, /* LCD_BPP = 2^4, for output conosle on LCD */
75 /* wDP panel timing infomation */
83 .vl_cmd_allow_len = 0xf,
86 .cfg_gpio = cfg_lcd_gpio,
90 .dual_lcd_enabled = 0,
95 .interface_mode = FIMD_RGB_INTERFACE,
99 static struct edp_device_info edp_info = {
112 .lt_status = DP_LT_NONE,
116 .bist_mode = DP_DISABLE,
117 .bist_pattern = NO_PATTERN,
118 .h_sync_polarity = 0,
119 .v_sync_polarity = 0,
121 .color_space = COLOR_RGB,
122 .dynamic_range = VESA,
123 .ycbcr_coeff = COLOR_YCBCR601,
124 .color_depth = COLOR_8,
128 static struct exynos_dp_platform_data dp_platform_data = {
129 .phy_enable = set_dp_phy_ctrl,
130 .edp_dev_info = &edp_info,
133 void init_panel_info(vidinfo_t *vid)
135 vid->rgb_mode = MODE_RGB_P;
137 exynos_set_dp_platform_data(&dp_platform_data);
141 int board_get_revision(void)