2 * Copyright (C) 2013 Samsung Electronics
4 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/board.h>
14 #include <asm/arch/cpu.h>
15 #include <asm/arch/gpio.h>
16 #include <asm/arch/pinmux.h>
17 #include <asm/arch/dp_info.h>
19 DECLARE_GLOBAL_DATA_PTR;
21 #ifdef CONFIG_USB_EHCI_EXYNOS
22 static int board_usb_vbus_init(void)
24 /* Enable VBUS power switch */
25 gpio_direction_output(EXYNOS5420_GPIO_X26, 1);
27 /* VBUS turn ON time */
36 #ifdef CONFIG_USB_EHCI_EXYNOS
37 board_usb_vbus_init();
43 void cfg_lcd_gpio(void)
45 struct exynos5_gpio_part1 *gpio1 =
46 (struct exynos5_gpio_part1 *)samsung_get_base_gpio_part1();
49 gpio_cfg_pin(EXYNOS5420_GPIO_B20, S5P_GPIO_OUTPUT);
50 gpio_set_value(EXYNOS5420_GPIO_B20, 1);
53 gpio_cfg_pin(EXYNOS5420_GPIO_X15, S5P_GPIO_OUTPUT);
54 gpio_set_value(EXYNOS5420_GPIO_X15, 1);
56 /* Set Hotplug detect for DP */
57 gpio_cfg_pin(EXYNOS5420_GPIO_X07, S5P_GPIO_FUNC(0x3));
60 vidinfo_t panel_info = {
66 .vl_clkp = CONFIG_SYS_LOW,
67 .vl_hsp = CONFIG_SYS_LOW,
68 .vl_vsp = CONFIG_SYS_LOW,
69 .vl_dp = CONFIG_SYS_LOW,
70 .vl_bpix = 4, /* LCD_BPP = 2^4, for output conosle on LCD */
72 /* wDP panel timing infomation */
80 .vl_cmd_allow_len = 0xf,
83 .cfg_gpio = cfg_lcd_gpio,
87 .dual_lcd_enabled = 0,
92 .interface_mode = FIMD_RGB_INTERFACE,
96 static struct edp_device_info edp_info = {
109 .lt_status = DP_LT_NONE,
113 .bist_mode = DP_DISABLE,
114 .bist_pattern = NO_PATTERN,
115 .h_sync_polarity = 0,
116 .v_sync_polarity = 0,
118 .color_space = COLOR_RGB,
119 .dynamic_range = VESA,
120 .ycbcr_coeff = COLOR_YCBCR601,
121 .color_depth = COLOR_8,
125 static struct exynos_dp_platform_data dp_platform_data = {
126 .phy_enable = set_dp_phy_ctrl,
127 .edp_dev_info = &edp_info,
130 void init_panel_info(vidinfo_t *vid)
132 vid->rgb_mode = MODE_RGB_P;
134 exynos_set_dp_platform_data(&dp_platform_data);
138 int board_get_revision(void)