4 #include <asm/arch/cpu.h>
13 #ifndef CONFIG_ONENAND_IPL
64 /* Enable All Clocks */
96 #ifdef CONFIG_ONENAND_IPL
100 * r1 : DRAM base (???)
104 /* DQS Offset Value */
110 /* DDRPHY DLL Lock */
129 /* DDR ZQ Calibration */
141 /* LPCON setting for 333MHz */
167 /* Memory Device Initialization */
212 /* LPCON normal refresh start */
223 #ifndef CONFIG_ONENAND_IPL