1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2013 SAMSUNG Electronics
4 * Rajeshwari Shinde <rajeshwari.s@samsung.com>
16 #include <asm/arch/board.h>
17 #include <asm/arch/cpu.h>
18 #include <asm/arch/dwmmc.h>
19 #include <asm/arch/mmc.h>
20 #include <asm/arch/pinmux.h>
21 #include <asm/arch/power.h>
22 #include <asm/arch/system.h>
23 #include <asm/arch/sromc.h>
27 #include <dwc3-uboot.h>
28 #include <samsung/misc.h>
29 #include <dm/pinctrl.h>
32 DECLARE_GLOBAL_DATA_PTR;
34 __weak int exynos_early_init_f(void)
39 __weak int exynos_power_init(void)
44 #if defined CONFIG_EXYNOS_TMU
45 /* Boot Time Thermal Analysis for SoC temperature threshold breach */
46 static void boot_temp_check(void)
50 switch (tmu_monitor(&temp)) {
51 case TMU_STATUS_NORMAL:
53 case TMU_STATUS_TRIPPED:
55 * Status TRIPPED ans WARNING means corresponding threshold
58 puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n");
62 case TMU_STATUS_WARNING:
63 puts("EXYNOS_TMU: WARNING! Temperature very high\n");
67 * TMU_STATUS_INIT means something is wrong with temperature
68 * sensing and TMU status was changed back from NORMAL to INIT.
70 puts("EXYNOS_TMU: WARNING! Temperature sensing not done\n");
73 debug("EXYNOS_TMU: Unknown TMU state\n");
80 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
81 #if defined CONFIG_EXYNOS_TMU
82 if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) {
83 debug("%s: Failed to init TMU\n", __func__);
88 #ifdef CONFIG_TZSW_RESERVED_DRAM_SIZE
89 /* The last few MB of memory can be reserved for secure firmware */
90 ulong size = CONFIG_TZSW_RESERVED_DRAM_SIZE;
93 gd->bd->bi_dram[CONFIG_NR_DRAM_BANKS - 1].size -= size;
103 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
104 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
105 gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
110 int dram_init_banksize(void)
113 unsigned long addr, size;
115 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
116 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
117 size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
119 gd->bd->bi_dram[i].start = addr;
120 gd->bd->bi_dram[i].size = size;
126 static int board_uart_init(void)
128 #ifndef CONFIG_PINCTRL_EXYNOS
129 int err, uart_id, ret = 0;
131 for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
132 err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
134 debug("UART%d not configured\n",
135 (uart_id - PERIPH_ID_UART0));
145 #ifdef CONFIG_BOARD_EARLY_INIT_F
146 int board_early_init_f(void)
149 #ifdef CONFIG_BOARD_TYPES
152 err = board_uart_init();
154 debug("UART init failed\n");
158 #ifdef CONFIG_SYS_I2C_INIT_BOARD
159 board_i2c_init(gd->fdt_blob);
162 return exynos_early_init_f();
166 #if defined(CONFIG_POWER) || defined(CONFIG_DM_PMIC)
167 int power_init_board(void)
171 return exynos_power_init();
175 #ifdef CONFIG_SMC911X
176 static int decode_sromc(const void *blob, struct fdt_sromc *config)
181 node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC);
183 debug("Could not find SROMC node\n");
187 config->bank = fdtdec_get_int(blob, node, "bank", 0);
188 config->width = fdtdec_get_int(blob, node, "width", 2);
190 err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing,
191 FDT_SROM_TIMING_COUNT);
193 debug("Could not decode SROMC configuration Error: %s\n",
195 return -FDT_ERR_NOTFOUND;
201 int board_eth_init(bd_t *bis)
203 #ifdef CONFIG_SMC911X
204 u32 smc_bw_conf, smc_bc_conf;
205 struct fdt_sromc config;
206 fdt_addr_t base_addr;
209 node = decode_sromc(gd->fdt_blob, &config);
211 debug("%s: Could not find sromc configuration\n", __func__);
214 node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215);
216 debug("%s: Could not find lan9215 configuration\n", __func__);
220 /* We now have a node, so any problems from now on are errors */
221 base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");
222 if (base_addr == FDT_ADDR_T_NONE) {
223 debug("%s: Could not find lan9215 address\n", __func__);
227 /* Ethernet needs data bus width of 16 bits */
228 if (config.width != 2) {
229 debug("%s: Unsupported bus width %d\n", __func__,
233 smc_bw_conf = SROMC_DATA16_WIDTH(config.bank)
234 | SROMC_BYTE_ENABLE(config.bank);
236 smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) |
237 SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) |
238 SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) |
239 SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) |
240 SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) |
241 SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) |
242 SROMC_BC_PMC(config.timing[FDT_SROM_PMC]);
244 /* Select and configure the SROMC bank */
245 exynos_pinmux_config(PERIPH_ID_SROMC, config.bank);
246 s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf);
247 return smc911x_initialize(0, base_addr);
253 static int init_mmc(void)
255 #ifdef CONFIG_MMC_SDHCI
256 return exynos_mmc_init(gd->fdt_blob);
262 static int init_dwmmc(void)
265 return exynos_dwmmc_init(gd->fdt_blob);
271 int board_mmc_init(bd_t *bis)
275 if (get_boot_mode() == BOOT_MODE_SD) {
284 debug("mmc init failed\n");
290 #ifdef CONFIG_DISPLAY_BOARDINFO
293 const char *board_info;
295 board_info = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
296 printf("Board: %s\n", board_info ? board_info : "unknown");
297 #ifdef CONFIG_BOARD_TYPES
298 board_info = get_board_type();
300 printf("Type: %s\n", board_info);
306 #ifdef CONFIG_BOARD_LATE_INIT
307 int board_late_init(void)
309 stdio_print_current_devices();
311 if (cros_ec_get_error()) {
312 /* Force console on */
313 gd->flags &= ~GD_FLG_SILENT;
315 printf("cros-ec communications failure %d\n",
316 cros_ec_get_error());
317 puts("\nPlease reset with Power+Refresh\n\n");
318 panic("Cannot init cros-ec device");
325 #ifdef CONFIG_MISC_INIT_R
326 int misc_init_r(void)
328 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
331 #ifdef CONFIG_LCD_MENU
335 #ifdef CONFIG_CMD_BMP
336 if (panel_info.logo_on)
343 void reset_misc(void)
345 struct gpio_desc gpio = {};
348 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
349 "samsung,emmc-reset");
353 gpio_request_by_name_nodev(offset_to_ofnode(node), "reset-gpio", 0,
354 &gpio, GPIOD_IS_OUT);
356 if (dm_gpio_is_valid(&gpio)) {
360 * FIXME: Need to optimize delay time. Minimum 1usec pulse is
361 * required by 'JEDEC Standard No.84-A441' (eMMC)
362 * document but real delay time is expected to greater
365 dm_gpio_set_value(&gpio, 0);
367 dm_gpio_set_value(&gpio, 1);
371 int board_usb_cleanup(int index, enum usb_init_type init)
373 #ifdef CONFIG_USB_DWC3
374 dwc3_uboot_exit(index);