1 // SPDX-License-Identifier: GPL-2.0+
3 * board/renesas/salvator-x/salvator-x.c
4 * This file is Salvator-X/Salvator-XS board support.
6 * Copyright (C) 2015-2017 Renesas Electronics Corporation
7 * Copyright (C) 2015 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
14 #include <dm/platform_data/serial_sh.h>
15 #include <asm/processor.h>
16 #include <asm/mach-types.h>
18 #include <linux/errno.h>
19 #include <asm/arch/sys_proto.h>
21 #include <asm/arch/gpio.h>
22 #include <asm/arch/rmobile.h>
23 #include <asm/arch/rcar-mstp.h>
24 #include <asm/arch/sh_sdhi.h>
28 DECLARE_GLOBAL_DATA_PTR;
34 #define SCIF2_MSTP310 BIT(10) /* SCIF2 */
35 #define DVFS_MSTP926 BIT(26)
36 #define HSUSB_MSTP704 BIT(4) /* HSUSB */
38 int board_early_init_f(void)
40 #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
42 mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926);
48 /* R/- 32 Power status register 2(3DG) */
49 #define SYSC_PWRSR2 0xE6180100
50 /* -/W 32 Power resume control register 2 (3DG) */
51 #define SYSC_PWRONCR2 0xE618010C
53 /* HSUSB block registers */
54 #define HSUSB_REG_LPSTS 0xE6590102
55 #define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14)
56 #define HSUSB_REG_UGCTRL2 0xE6590184
57 #define HSUSB_REG_UGCTRL2_USB0SEL 0x30
58 #define HSUSB_REG_UGCTRL2_USB0SEL_EHCI 0x10
62 /* adress of boot parameters */
63 gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
66 setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN);
68 /* Configure the HSUSB block */
69 mstp_clrbits_le32(MSTPSR7, SMSTPCR7, HSUSB_MSTP704);
71 clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL,
72 HSUSB_REG_UGCTRL2_USB0SEL_EHCI);
73 /* low power status */
74 setbits_le16(HSUSB_REG_LPSTS, HSUSB_REG_LPSTS_SUSPM_NORMAL);
81 if (fdtdec_setup_mem_size_base() != 0)
87 int dram_init_banksize(void)
89 fdtdec_setup_memory_banksize();
94 #define RST_BASE 0xE6160000
95 #define RST_CA57RESCNT (RST_BASE + 0x40)
96 #define RST_CA53RESCNT (RST_BASE + 0x44)
97 #define RST_RSTOUTCR (RST_BASE + 0x58)
98 #define RST_CODE 0xA5A5000F
100 void reset_cpu(ulong addr)
102 #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
103 i2c_reg_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x20, 0x80);
106 writel(RST_CODE, RST_CA57RESCNT);