1 // SPDX-License-Identifier: GPL-2.0+
3 * board/renesas/draak/draak.c
4 * This file is Draak board support.
6 * Copyright (C) 2017 Marek Vasut <marek.vasut+renesas@gmail.com>
16 #include <asm/global_data.h>
17 #include <dm/platform_data/serial_sh.h>
18 #include <asm/processor.h>
19 #include <asm/mach-types.h>
21 #include <linux/bitops.h>
22 #include <linux/errno.h>
23 #include <asm/arch/sys_proto.h>
25 #include <asm/arch/gpio.h>
26 #include <asm/arch/rmobile.h>
27 #include <asm/arch/rcar-mstp.h>
28 #include <asm/arch/sh_sdhi.h>
32 DECLARE_GLOBAL_DATA_PTR;
34 #define GSX_MSTP112 BIT(12) /* 3DG */
35 #define SCIF2_MSTP310 BIT(10) /* SCIF2 */
36 #define DVFS_MSTP926 BIT(26)
37 #define HSUSB_MSTP704 BIT(4) /* HSUSB */
39 int board_early_init_f(void)
41 #if defined(CONFIG_SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH)
43 mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
48 /* HSUSB block registers */
49 #define HSUSB_REG_LPSTS 0xE6590102
50 #define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14)
51 #define HSUSB_REG_UGCTRL2 0xE6590184
52 #define HSUSB_REG_UGCTRL2_USB0SEL 0x30
53 #define HSUSB_REG_UGCTRL2_USB0SEL_EHCI 0x10
58 setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN);
60 /* Configure the HSUSB block */
61 mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704);
63 clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL,
64 HSUSB_REG_UGCTRL2_USB0SEL_EHCI);
65 /* low power status */
66 setbits_le16(HSUSB_REG_LPSTS, HSUSB_REG_LPSTS_SUSPM_NORMAL);
71 #define RST_BASE 0xE6160000
72 #define RST_CA53RESCNT (RST_BASE + 0x44)
73 #define RST_CA53_CODE 0x5A5A000F
77 writel(RST_CA53_CODE, RST_CA53RESCNT);