2 * Copyright (C) 2008 Renesas Solutions Corp.
3 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
5 * board/ap325rxa/lowlevel_init.S
7 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/processor.h>
12 #include <asm/macro.h>
15 * Board specific low level init code, called _very_ early in the
16 * startup sequence. Relocation to SDRAM has not happened yet, no
17 * stack is available, bss section has not been initialised, etc.
19 * (Note: As no stack is available, no subroutines can be called...).
28 write16 DRVCRA_A, DRVCRA_D
30 write16 DRVCRB_A, DRVCRB_D
32 write16 RWTCSR_A, RWTCSR_D1
34 write16 RWTCNT_A, RWTCNT_D
36 write16 RWTCSR_A, RWTCSR_D2
38 write32 FRQCR_A, FRQCR_D
40 write32 CMNCR_A, CMNCR_D
42 write32 CS0BCR_A, CS0BCR_D
44 write32 CS4BCR_A, CS4BCR_D
46 write32 CS5ABCR_A, CS5ABCR_D
48 write32 CS5BBCR_A, CS5BBCR_D
50 write32 CS6ABCR_A, CS6ABCR_D
52 write32 CS6BBCR_A, CS6BBCR_D
54 write32 CS0WCR_A, CS0WCR_D
56 write32 CS4WCR_A, CS4WCR_D
58 write32 CS5AWCR_A, CS5AWCR_D
60 write32 CS5BWCR_A, CS5BWCR_D
62 write32 CS6AWCR_A, CS6AWCR_D
64 write32 CS6BWCR_A, CS6BWCR_D
66 write32 SBSC_SDCR_A, SBSC_SDCR_D1
68 write32 SBSC_SDWCR_A, SBSC_SDWCR_D
70 write32 SBSC_SDPCR_A, SBSC_SDPCR_D
72 write32 SBSC_RTCSR_A, SBSC_RTCSR_D
74 write32 SBSC_RTCNT_A, SBSC_RTCNT_D
76 write32 SBSC_RTCOR_A, SBSC_RTCOR_D
78 write8 SBSC_SDMR3_A1, SBSC_SDMR3_D
80 write8 SBSC_SDMR3_A2, SBSC_SDMR3_D
88 write8 SBSC_SDMR3_A3, SBSC_SDMR3_D
90 write32 SBSC_SDCR_A, SBSC_SDCR_D2
94 ! BL bit off (init = ON) (?!?)
96 stc sr, r0 ! BL bit off(init=ON)
106 DRVCRA_A: .long DRVCRA
107 DRVCRB_A: .long DRVCRB
108 DRVCRA_D: .word 0x4555
109 DRVCRB_D: .word 0x0005
111 RWTCSR_A: .long RWTCSR
112 RWTCNT_A: .long RWTCNT
114 RWTCSR_D1: .word 0xa507
115 RWTCSR_D2: .word 0xa504
116 RWTCNT_D: .word 0x5a00
118 FRQCR_D: .long 0x0b04474a
120 SBSC_SDCR_A: .long SBSC_SDCR
121 SBSC_SDWCR_A: .long SBSC_SDWCR
122 SBSC_SDPCR_A: .long SBSC_SDPCR
123 SBSC_RTCSR_A: .long SBSC_RTCSR
124 SBSC_RTCNT_A: .long SBSC_RTCNT
125 SBSC_RTCOR_A: .long SBSC_RTCOR
126 SBSC_SDMR3_A1: .long 0xfe510000
127 SBSC_SDMR3_A2: .long 0xfe500242
128 SBSC_SDMR3_A3: .long 0xfe5c0042
130 SBSC_SDCR_D1: .long 0x92810112
131 SBSC_SDCR_D2: .long 0x92810912
132 SBSC_SDWCR_D: .long 0x05162482
133 SBSC_SDPCR_D: .long 0x00300087
134 SBSC_RTCSR_D: .long 0xa55a0212
135 SBSC_RTCNT_D: .long 0xa55a0000
136 SBSC_RTCOR_D: .long 0xa55a0040
137 SBSC_SDMR3_D: .long 0x00
140 CS0BCR_A: .long CS0BCR
141 CS4BCR_A: .long CS4BCR
142 CS5ABCR_A: .long CS5ABCR
143 CS5BBCR_A: .long CS5BBCR
144 CS6ABCR_A: .long CS6ABCR
145 CS6BBCR_A: .long CS6BBCR
146 CS0WCR_A: .long CS0WCR
147 CS4WCR_A: .long CS4WCR
148 CS5AWCR_A: .long CS5AWCR
149 CS5BWCR_A: .long CS5BWCR
150 CS6AWCR_A: .long CS6AWCR
151 CS6BWCR_A: .long CS6BWCR
153 CMNCR_D: .long 0x00000013
154 CS0BCR_D: .long 0x24920400
155 CS4BCR_D: .long 0x24920400
156 CS5ABCR_D: .long 0x24920400
157 CS5BBCR_D: .long 0x7fff0600
158 CS6ABCR_D: .long 0x24920400
159 CS6BBCR_D: .long 0x24920600
160 CS0WCR_D: .long 0x00000480
161 CS4WCR_D: .long 0x00000480
162 CS5AWCR_D: .long 0x00000380
163 CS5BWCR_D: .long 0x00000080
164 CS6AWCR_D: .long 0x00000300
165 CS6BWCR_D: .long 0x00000540
167 CCR_A: .long 0xff00001c
168 CCR_D: .long 0x0000090d
170 SLEEP_CNT: .long 0x00000800
171 SR_MASK_D: .long 0xEFFFFF0F