2 * Maintainer : Steve Sakoman <steve@sakoman.com>
4 * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
5 * Richard Woodruff <r-woodruff2@ti.com>
6 * Syed Mohammed Khasim <khasim@ti.com>
7 * Sunil Kumar <sunilsaini05@gmail.com>
8 * Shashi Ranjan <shashiranjanmca05@gmail.com>
10 * (C) Copyright 2004-2008
11 * Texas Instruments, <www.ti.com>
13 * See file CREDITS for list of people who contributed to this
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
33 #include <asm/arch/mux.h>
34 #include <asm/arch/sys_proto.h>
35 #include <asm/mach-types.h>
38 /******************************************************************************
40 * Description: Early hardware init.
41 *****************************************************************************/
44 DECLARE_GLOBAL_DATA_PTR;
46 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
47 /* board id for Linux */
48 gd->bd->bi_arch_number = MACH_TYPE_OVERO;
50 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
55 /******************************************************************************
56 * Routine: misc_init_r
57 * Description: Configure board specific parts
58 *****************************************************************************/
61 gpio_t *gpio5_base = (gpio_t *)OMAP34XX_GPIO5_BASE;
62 gpio_t *gpio6_base = (gpio_t *)OMAP34XX_GPIO6_BASE;
66 /* Configure GPIOs to output */
67 writel(~((GPIO10) | GPIO9 | GPIO3 | GPIO2), &gpio6_base->oe);
68 writel(~(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
69 GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
72 writel(GPIO10 | GPIO9 | GPIO3 | GPIO2, &gpio6_base->setdataout);
73 writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
74 GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
79 /******************************************************************************
80 * Routine: set_muxconf_regs
81 * Description: Setting up the configuration Mux registers specific to the
82 * hardware. Many pins need to be moved from protect to primary
84 *****************************************************************************/
85 void set_muxconf_regs(void)