2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <asm/arch/tegra2.h>
27 #include <asm/arch/pinmux.h>
29 #ifdef CONFIG_TEGRA2_MMC
32 #include "../common/board.h"
35 * Routine: gpio_config_uart
36 * Description: Force GPIO_PI3 low on Seaboard so UART4 works.
38 void gpio_config_uart(void)
41 struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
42 struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
45 /* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */
46 val = readl(&bank->gpio_config[GPIO_PORT(gp)]);
47 val |= 1 << GPIO_BIT(gp);
48 writel(val, &bank->gpio_config[GPIO_PORT(gp)]);
50 val = readl(&bank->gpio_out[GPIO_PORT(gp)]);
51 val &= ~(1 << GPIO_BIT(gp));
52 writel(val, &bank->gpio_out[GPIO_PORT(gp)]);
54 val = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]);
55 val |= 1 << GPIO_BIT(gp);
56 writel(val, &bank->gpio_dir_out[GPIO_PORT(gp)]);
59 #ifdef CONFIG_TEGRA2_MMC
61 * Routine: pin_mux_mmc
62 * Description: setup the pin muxes/tristate values for the SDMMC(s)
64 static void pin_mux_mmc(void)
66 /* SDMMC4: config 3, x8 on 2nd set of pins */
67 pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4);
68 pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4);
69 pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4);
71 pinmux_tristate_disable(PINGRP_ATB);
72 pinmux_tristate_disable(PINGRP_GMA);
73 pinmux_tristate_disable(PINGRP_GME);
75 /* SDMMC3: SDIO3_CLK, SDIO3_CMD, SDIO3_DAT[3:0] */
76 pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3);
77 pinmux_set_func(PINGRP_SDC, PMUX_FUNC_SDIO3);
78 pinmux_set_func(PINGRP_SDD, PMUX_FUNC_SDIO3);
80 pinmux_tristate_disable(PINGRP_SDC);
81 pinmux_tristate_disable(PINGRP_SDD);
82 pinmux_tristate_disable(PINGRP_SDB);
84 /* For power GPIO PI6 */
85 pinmux_tristate_disable(PINGRP_ATA);
87 pinmux_tristate_disable(PINGRP_ATC);
90 /* this is a weak define that we are overriding */
91 int board_mmc_init(bd_t *bd)
93 debug("board_mmc_init called\n");
95 /* Enable muxes, etc. for SDMMC controllers */
98 debug("board_mmc_init: init eMMC\n");
99 /* init dev 0, eMMC chip, with 4-bit bus */
100 /* The board has an 8-bit bus, but 8-bit doesn't work yet */
101 tegra2_mmc_init(0, 4, -1, -1);
103 debug("board_mmc_init: init SD slot\n");
104 /* init dev 1, SD slot, with 4-bit bus */
105 tegra2_mmc_init(1, 4, GPIO_PI6, GPIO_PI5);