2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
5 * SPDX-License-Identifier: GPL-2.0+
10 #include <linux/compiler.h>
12 #include <asm/arch/clock.h>
14 #include <asm/arch/display.h>
16 #include <asm/arch/funcmux.h>
17 #include <asm/arch/pinmux.h>
18 #include <asm/arch/pmu.h>
19 #ifdef CONFIG_PWM_TEGRA
20 #include <asm/arch/pwm.h>
22 #include <asm/arch/tegra.h>
23 #include <asm/arch-tegra/board.h>
24 #include <asm/arch-tegra/clk_rst.h>
25 #include <asm/arch-tegra/pmc.h>
26 #include <asm/arch-tegra/sys_proto.h>
27 #include <asm/arch-tegra/uart.h>
28 #include <asm/arch-tegra/warmboot.h>
29 #ifdef CONFIG_TEGRA_CLOCK_SCALING
30 #include <asm/arch/emc.h>
32 #ifdef CONFIG_USB_EHCI_TEGRA
33 #include <asm/arch-tegra/usb.h>
36 #ifdef CONFIG_TEGRA_MMC
37 #include <asm/arch-tegra/tegra_mmc.h>
38 #include <asm/arch-tegra/mmc.h>
44 DECLARE_GLOBAL_DATA_PTR;
46 const struct tegra_sysinfo sysinfo = {
47 CONFIG_TEGRA_BOARD_STRING
50 void __pinmux_init(void)
54 void pinmux_init(void) __attribute__((weak, alias("__pinmux_init")));
56 void __pin_mux_usb(void)
60 void pin_mux_usb(void) __attribute__((weak, alias("__pin_mux_usb")));
62 void __pin_mux_spi(void)
66 void pin_mux_spi(void) __attribute__((weak, alias("__pin_mux_spi")));
68 void __gpio_early_init_uart(void)
72 void gpio_early_init_uart(void)
73 __attribute__((weak, alias("__gpio_early_init_uart")));
75 #if defined(CONFIG_TEGRA_NAND)
76 void __pin_mux_nand(void)
78 funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT);
81 void pin_mux_nand(void) __attribute__((weak, alias("__pin_mux_nand")));
84 void __pin_mux_display(void)
88 void pin_mux_display(void) __attribute__((weak, alias("__pin_mux_display")));
91 * Routine: power_det_init
92 * Description: turn off power detects
94 static void power_det_init(void)
96 #if defined(CONFIG_TEGRA20)
97 struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
99 /* turn off power detects */
100 writel(0, &pmc->pmc_pwr_det_latch);
101 writel(0, &pmc->pmc_pwr_det);
106 * Routine: board_init
107 * Description: Early hardware init.
111 __maybe_unused int err;
113 /* Do clocks and UART first so that printf() works */
117 #ifdef CONFIG_FDT_SPI
122 #ifdef CONFIG_PWM_TEGRA
123 if (pwm_init(gd->fdt_blob))
124 debug("%s: Failed to init pwm\n", __func__);
128 tegra_lcd_check_next_stage(gd->fdt_blob, 0);
130 /* boot param addr */
131 gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
135 #ifdef CONFIG_SYS_I2C_TEGRA
136 #ifndef CONFIG_SYS_I2C_INIT_BOARD
137 #error "You must define CONFIG_SYS_I2C_INIT_BOARD to use i2c on Nvidia boards"
140 # ifdef CONFIG_TEGRA_PMU
141 if (pmu_set_nominal())
142 debug("Failed to select nominal voltages\n");
143 # ifdef CONFIG_TEGRA_CLOCK_SCALING
144 err = board_emc_init();
146 debug("Memory controller init failed: %d\n", err);
148 # endif /* CONFIG_TEGRA_PMU */
149 #endif /* CONFIG_SYS_I2C_TEGRA */
151 #ifdef CONFIG_USB_EHCI_TEGRA
153 usb_process_devicetree(gd->fdt_blob);
157 tegra_lcd_check_next_stage(gd->fdt_blob, 0);
160 #ifdef CONFIG_TEGRA_NAND
164 #ifdef CONFIG_TEGRA_LP0
165 /* save Sdram params to PMC 2, 4, and 24 for WB0 */
166 warmboot_save_sdram_params();
168 /* prepare the WB code to LP0 location */
169 warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE);
175 #ifdef CONFIG_BOARD_EARLY_INIT_F
176 static void __gpio_early_init(void)
180 void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
182 int board_early_init_f(void)
187 /* Initialize periph GPIOs */
189 gpio_early_init_uart();
191 tegra_lcd_early_init(gd->fdt_blob);
196 #endif /* EARLY_INIT */
198 int board_late_init(void)
201 /* Make sure we finish initing the LCD */
202 tegra_lcd_check_next_stage(gd->fdt_blob, 1);
207 #if defined(CONFIG_TEGRA_MMC)
208 void __pin_mux_mmc(void)
212 void pin_mux_mmc(void) __attribute__((weak, alias("__pin_mux_mmc")));
214 /* this is a weak define that we are overriding */
215 int board_mmc_init(bd_t *bd)
217 debug("%s called\n", __func__);
219 /* Enable muxes, etc. for SDMMC controllers */
222 debug("%s: init MMC\n", __func__);
228 void pad_init_mmc(struct mmc_host *host)
230 #if defined(CONFIG_TEGRA30)
231 enum periph_id id = host->mmc_id;
234 debug("%s: sdmmc address = %08x, id = %d\n", __func__,
235 (unsigned int)host->reg, id);
237 /* Set the pad drive strength for SDMMC1 or 3 only */
238 if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) {
239 debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
244 val = readl(&host->reg->sdmemcmppadctl);
246 val |= MEMCOMP_PADCTRL_VREF;
247 writel(val, &host->reg->sdmemcmppadctl);
249 val = readl(&host->reg->autocalcfg);
251 val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
252 writel(val, &host->reg->autocalcfg);