2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
5 * SPDX-License-Identifier: GPL-2.0+
11 #include <linux/compiler.h>
13 #include <asm/arch/clock.h>
15 #include <asm/arch/display.h>
17 #include <asm/arch/funcmux.h>
18 #include <asm/arch/pinmux.h>
19 #include <asm/arch/pmu.h>
20 #ifdef CONFIG_PWM_TEGRA
21 #include <asm/arch/pwm.h>
23 #include <asm/arch/tegra.h>
24 #include <asm/arch-tegra/board.h>
25 #include <asm/arch-tegra/clk_rst.h>
26 #include <asm/arch-tegra/pmc.h>
27 #include <asm/arch-tegra/sys_proto.h>
28 #include <asm/arch-tegra/uart.h>
29 #include <asm/arch-tegra/warmboot.h>
30 #ifdef CONFIG_TEGRA_CLOCK_SCALING
31 #include <asm/arch/emc.h>
33 #ifdef CONFIG_USB_EHCI_TEGRA
34 #include <asm/arch-tegra/usb.h>
37 #ifdef CONFIG_TEGRA_MMC
38 #include <asm/arch-tegra/tegra_mmc.h>
39 #include <asm/arch-tegra/mmc.h>
45 DECLARE_GLOBAL_DATA_PTR;
47 #ifdef CONFIG_SPL_BUILD
48 /* TODO(sjg@chromium.org): Remove once SPL supports device tree */
49 U_BOOT_DEVICE(tegra_gpios) = {
54 const struct tegra_sysinfo sysinfo = {
55 CONFIG_TEGRA_BOARD_STRING
58 __weak void pinmux_init(void) {}
59 __weak void pin_mux_usb(void) {}
60 __weak void pin_mux_spi(void) {}
61 __weak void gpio_early_init_uart(void) {}
62 __weak void pin_mux_display(void) {}
64 #if defined(CONFIG_TEGRA_NAND)
65 __weak void pin_mux_nand(void)
67 funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT);
72 * Routine: power_det_init
73 * Description: turn off power detects
75 static void power_det_init(void)
77 #if defined(CONFIG_TEGRA20)
78 struct pmc_ctlr *const pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
80 /* turn off power detects */
81 writel(0, &pmc->pmc_pwr_det_latch);
82 writel(0, &pmc->pmc_pwr_det);
88 * Description: Early hardware init.
92 __maybe_unused int err;
94 /* Do clocks and UART first so that printf() works */
98 #ifdef CONFIG_TEGRA_SPI
102 #ifdef CONFIG_PWM_TEGRA
103 if (pwm_init(gd->fdt_blob))
104 debug("%s: Failed to init pwm\n", __func__);
108 tegra_lcd_check_next_stage(gd->fdt_blob, 0);
110 /* boot param addr */
111 gd->bd->bi_boot_params = (NV_PA_SDRAM_BASE + 0x100);
115 #ifdef CONFIG_SYS_I2C_TEGRA
116 #ifndef CONFIG_SYS_I2C_INIT_BOARD
117 #error "You must define CONFIG_SYS_I2C_INIT_BOARD to use i2c on Nvidia boards"
120 # ifdef CONFIG_TEGRA_PMU
121 if (pmu_set_nominal())
122 debug("Failed to select nominal voltages\n");
123 # ifdef CONFIG_TEGRA_CLOCK_SCALING
124 err = board_emc_init();
126 debug("Memory controller init failed: %d\n", err);
128 # endif /* CONFIG_TEGRA_PMU */
129 #endif /* CONFIG_SYS_I2C_TEGRA */
131 #ifdef CONFIG_USB_EHCI_TEGRA
133 usb_process_devicetree(gd->fdt_blob);
137 tegra_lcd_check_next_stage(gd->fdt_blob, 0);
140 #ifdef CONFIG_TEGRA_NAND
144 #ifdef CONFIG_TEGRA_LP0
145 /* save Sdram params to PMC 2, 4, and 24 for WB0 */
146 warmboot_save_sdram_params();
148 /* prepare the WB code to LP0 location */
149 warmboot_prepare_code(TEGRA_LP0_ADDR, TEGRA_LP0_SIZE);
155 #ifdef CONFIG_BOARD_EARLY_INIT_F
156 static void __gpio_early_init(void)
160 void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
162 int board_early_init_f(void)
167 /* Initialize periph GPIOs */
169 gpio_early_init_uart();
171 tegra_lcd_early_init(gd->fdt_blob);
176 #endif /* EARLY_INIT */
178 int board_late_init(void)
181 /* Make sure we finish initing the LCD */
182 tegra_lcd_check_next_stage(gd->fdt_blob, 1);
187 #if defined(CONFIG_TEGRA_MMC)
188 __weak void pin_mux_mmc(void)
192 /* this is a weak define that we are overriding */
193 int board_mmc_init(bd_t *bd)
195 debug("%s called\n", __func__);
197 /* Enable muxes, etc. for SDMMC controllers */
200 debug("%s: init MMC\n", __func__);
206 void pad_init_mmc(struct mmc_host *host)
208 #if defined(CONFIG_TEGRA30)
209 enum periph_id id = host->mmc_id;
212 debug("%s: sdmmc address = %08x, id = %d\n", __func__,
213 (unsigned int)host->reg, id);
215 /* Set the pad drive strength for SDMMC1 or 3 only */
216 if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) {
217 debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
222 val = readl(&host->reg->sdmemcmppadctl);
224 val |= MEMCOMP_PADCTRL_VREF;
225 writel(val, &host->reg->sdmemcmppadctl);
227 val = readl(&host->reg->autocalcfg);
229 val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
230 writel(val, &host->reg->autocalcfg);