1 // SPDX-License-Identifier: GPL-2.0+
4 * Ивайло Димитров <freemangordon@abv.bg>
6 * (C) Copyright 2011-2012
7 * Pali Rohár <pali@kernel.org>
10 * Alistair Buxton <a.j.buxton@gmail.com>
12 * Derived from Beagle Board and 3430 SDP code:
13 * (C) Copyright 2004-2008
14 * Texas Instruments, <www.ti.com>
17 * Sunil Kumar <sunilsaini05@gmail.com>
18 * Shashi Ranjan <shashiranjanmca05@gmail.com>
20 * Richard Woodruff <r-woodruff2@ti.com>
21 * Syed Mohammed Khasim <khasim@ti.com>
33 #include <asm/global_data.h>
35 #include <asm/setup.h>
36 #include <asm/bitops.h>
37 #include <asm/mach-types.h>
38 #include <asm/omap_i2c.h>
39 #include <asm/arch/mux.h>
40 #include <asm/arch/sys_proto.h>
41 #include <asm/arch/mmc_host_def.h>
45 /* Needed for ROM SMC call */
46 struct emu_hal_params_rx51 {
54 #define ONENAND_GPMC_CONFIG1_RX51 0xfb001202
55 #define ONENAND_GPMC_CONFIG2_RX51 0x00111100
56 #define ONENAND_GPMC_CONFIG3_RX51 0x00020200
57 #define ONENAND_GPMC_CONFIG4_RX51 0x11001102
58 #define ONENAND_GPMC_CONFIG5_RX51 0x03101616
59 #define ONENAND_GPMC_CONFIG6_RX51 0x90060000
61 DECLARE_GLOBAL_DATA_PTR;
65 const omap3_sysinfo sysinfo = {
71 /* This structure contains default omap tags needed for booting Maemo 5 */
72 static struct tag_omap omap[] = {
73 OMAP_TAG_UART_CONFIG(0x04),
74 OMAP_TAG_SERIAL_CONSOLE_CONFIG(0x03, 0x01C200),
75 OMAP_TAG_LCD_CONFIG("acx565akm", "internal", 90, 0x18),
76 OMAP_TAG_GPIO_SWITCH_CONFIG("cam_focus", 0x44, 0x1, 0x2, 0x0),
77 OMAP_TAG_GPIO_SWITCH_CONFIG("cam_launch", 0x45, 0x1, 0x2, 0x0),
78 OMAP_TAG_GPIO_SWITCH_CONFIG("cam_shutter", 0x6e, 0x1, 0x0, 0x0),
79 OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_apeslpx", 0x46, 0x2, 0x2, 0x0),
80 OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_bsi", 0x9d, 0x2, 0x2, 0x0),
81 OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_en", 0x4a, 0x2, 0x2, 0x0),
82 OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_rst", 0x4b, 0x6, 0x2, 0x0),
83 OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_rst_rq", 0x49, 0x6, 0x2, 0x0),
84 OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_wddis", 0x0d, 0x2, 0x2, 0x0),
85 OMAP_TAG_GPIO_SWITCH_CONFIG("headphone", 0xb1, 0x1, 0x1, 0x0),
86 OMAP_TAG_GPIO_SWITCH_CONFIG("kb_lock", 0x71, 0x1, 0x0, 0x0),
87 OMAP_TAG_GPIO_SWITCH_CONFIG("proximity", 0x59, 0x0, 0x0, 0x0),
88 OMAP_TAG_GPIO_SWITCH_CONFIG("sleep_ind", 0xa2, 0x2, 0x2, 0x0),
89 OMAP_TAG_GPIO_SWITCH_CONFIG("slide", GPIO_SLIDE, 0x0, 0x0, 0x0),
90 OMAP_TAG_WLAN_CX3110X_CONFIG(0x25, 0xff, 87, 42, -1),
91 OMAP_TAG_PARTITION_CONFIG("bootloader", 128 * 1024, 0x00000000, 0x00000003),
92 OMAP_TAG_PARTITION_CONFIG("config", 384 * 1024, 0x00020000, 0x00000000),
93 OMAP_TAG_PARTITION_CONFIG("log", 256 * 1024, 0x00080000, 0x00000000),
94 OMAP_TAG_PARTITION_CONFIG("kernel", 2 * 1024*1024, 0x000c0000, 0x00000000),
95 OMAP_TAG_PARTITION_CONFIG("initfs", 2 * 1024*1024, 0x002c0000, 0x00000000),
96 OMAP_TAG_PARTITION_CONFIG("rootfs", 257280 * 1024, 0x004c0000, 0x00000000),
97 OMAP_TAG_BOOT_REASON_CONFIG("pwr_key"),
98 OMAP_TAG_VERSION_STR_CONFIG("product", "RX-51"),
99 OMAP_TAG_VERSION_STR_CONFIG("hw-build", "2101"),
100 OMAP_TAG_VERSION_STR_CONFIG("nolo", "1.4.14"),
101 OMAP_TAG_VERSION_STR_CONFIG("boot-mode", "normal"),
105 static char *boot_reason_ptr;
106 static char *hw_build_ptr;
107 static char *nolo_version_ptr;
108 static char *boot_mode_ptr;
109 static int serial_was_console_enabled;
112 * Routine: init_omap_tags
113 * Description: Initialize pointers to values in tag_omap
115 static void init_omap_tags(void)
120 while (omap[i].hdr.tag) {
121 switch (omap[i].hdr.tag) {
122 case OMAP_TAG_BOOT_REASON:
123 boot_reason_ptr = omap[i].u.boot_reason.reason_str;
125 case OMAP_TAG_VERSION_STR:
126 component = omap[i].u.version.component;
127 version = omap[i].u.version.version;
128 if (strcmp(component, "hw-build") == 0)
129 hw_build_ptr = version;
130 else if (strcmp(component, "nolo") == 0)
131 nolo_version_ptr = version;
132 else if (strcmp(component, "boot-mode") == 0)
133 boot_mode_ptr = version;
142 static void reuse_omap_atags(struct tag_omap *t)
147 switch (t->hdr.tag) {
148 case OMAP_TAG_BOOT_REASON:
149 memset(boot_reason_ptr, 0, 12);
150 strcpy(boot_reason_ptr, t->u.boot_reason.reason_str);
152 case OMAP_TAG_VERSION_STR:
153 component = t->u.version.component;
154 version = t->u.version.version;
155 if (strcmp(component, "hw-build") == 0) {
156 memset(hw_build_ptr, 0, 12);
157 strcpy(hw_build_ptr, version);
158 } else if (strcmp(component, "nolo") == 0) {
159 memset(nolo_version_ptr, 0, 12);
160 strcpy(nolo_version_ptr, version);
161 } else if (strcmp(component, "boot-mode") == 0) {
162 memset(boot_mode_ptr, 0, 12);
163 strcpy(boot_mode_ptr, version);
167 if (t->u.uart.enabled_uarts)
168 serial_was_console_enabled = 1;
170 case OMAP_TAG_SERIAL_CONSOLE:
171 serial_was_console_enabled = 1;
176 t = tag_omap_next(t);
181 * Routine: reuse_atags
182 * Description: Reuse atags from previous bootloader.
183 * Reuse only only HW build, boot reason, boot mode and nolo
185 static void reuse_atags(void)
187 struct tag *t = (struct tag *)gd->bd->bi_boot_params;
189 /* First tag must be ATAG_CORE */
190 if (t->hdr.tag != ATAG_CORE)
193 if (!boot_reason_ptr || !hw_build_ptr)
196 /* Last tag must be ATAG_NONE */
197 while (t->hdr.tag != ATAG_NONE) {
198 switch (t->hdr.tag) {
200 memset(hw_build_ptr, 0, 12);
201 sprintf(hw_build_ptr, "%x", t->u.revision.rev);
204 reuse_omap_atags((struct tag_omap *)&t->u);
214 * Routine: board_init
215 * Description: Early hardware init.
219 #if defined(CONFIG_CMD_ONENAND)
220 const u32 gpmc_regs_onenandrx51[GPMC_MAX_REG] = {
221 ONENAND_GPMC_CONFIG1_RX51,
222 ONENAND_GPMC_CONFIG2_RX51,
223 ONENAND_GPMC_CONFIG3_RX51,
224 ONENAND_GPMC_CONFIG4_RX51,
225 ONENAND_GPMC_CONFIG5_RX51,
226 ONENAND_GPMC_CONFIG6_RX51,
230 /* in SRAM or SDRAM, finish GPMC */
232 #if defined(CONFIG_CMD_ONENAND)
233 enable_gpmc_cs_config(gpmc_regs_onenandrx51, &gpmc_cfg->cs[0],
234 CONFIG_SYS_ONENAND_BASE, GPMC_SIZE_256M);
236 /* Enable the clks & power */
238 /* boot param addr */
239 gd->bd->bi_boot_params = OMAP34XX_SDRC_CS0 + 0x100;
244 * Routine: get_board_revision
245 * Description: Return board revision.
247 u32 get_board_rev(void)
249 return simple_strtol(hw_build_ptr, NULL, 16);
253 * Routine: setup_board_tags
254 * Description: Append board specific boot tags.
256 void setup_board_tags(struct tag **in_params)
258 int setup_console_atag;
259 char *setup_boot_reason_atag;
260 char *setup_boot_mode_atag;
268 params = (struct tag *)gd->bd->bi_boot_params;
270 params->u.core.flags = 0x0;
271 params->u.core.pagesize = 0x1000;
272 params->u.core.rootdev = 0x0;
274 /* append omap atag only if env setup_omap_atag is set to 1 */
275 str = env_get("setup_omap_atag");
276 if (!str || str[0] != '1')
279 str = env_get("setup_console_atag");
282 setup_console_atag = 1;
284 setup_console_atag = 0;
286 if (serial_was_console_enabled)
287 setup_console_atag = 1;
289 setup_console_atag = 0;
292 setup_boot_reason_atag = env_get("setup_boot_reason_atag");
293 setup_boot_mode_atag = env_get("setup_boot_mode_atag");
296 t = (struct tag_omap *)¶ms->u;
297 total_size = sizeof(struct tag_header);
299 for (i = 0; omap[i].hdr.tag; i++) {
301 /* skip serial console tag */
302 if (!setup_console_atag &&
303 omap[i].hdr.tag == OMAP_TAG_SERIAL_CONSOLE)
306 size = omap[i].hdr.size + sizeof(struct tag_omap_header);
307 memcpy(t, &omap[i], size);
309 /* set uart tag to 0 - disable serial console */
310 if (!setup_console_atag && omap[i].hdr.tag == OMAP_TAG_UART)
311 t->u.uart.enabled_uarts = 0;
313 /* change boot reason */
314 if (setup_boot_reason_atag &&
315 omap[i].hdr.tag == OMAP_TAG_BOOT_REASON) {
316 memset(t->u.boot_reason.reason_str, 0, 12);
317 strcpy(t->u.boot_reason.reason_str,
318 setup_boot_reason_atag);
321 /* change boot mode */
322 if (setup_boot_mode_atag &&
323 omap[i].hdr.tag == OMAP_TAG_VERSION_STR &&
324 strcmp(omap[i].u.version.component, "boot-mode") == 0) {
325 memset(t->u.version.version, 0, 12);
326 strcpy(t->u.version.version, setup_boot_mode_atag);
330 t = tag_omap_next(t);
334 params->hdr.tag = ATAG_BOARD;
335 params->hdr.size = total_size >> 2;
336 params = tag_next(params);
342 * Routine: video_hw_init
343 * Description: Set up the GraphicDevice depending on sys_boot.
345 void *video_hw_init(void)
347 /* fill in Graphic Device */
348 gdev.frameAdrs = 0x8f9c0000;
352 gdev.gdfIndex = GDF_16BIT_565RGB;
353 memset((void *)gdev.frameAdrs, 0, 0xbb800);
354 return (void *) &gdev;
358 * Routine: twl4030_regulator_set_mode
359 * Description: Set twl4030 regulator mode over i2c powerbus.
361 static void twl4030_regulator_set_mode(u8 id, u8 mode)
363 u16 msg = MSG_SINGULAR(DEV_GRP_P1, id, mode);
364 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
365 TWL4030_PM_MASTER_PB_WORD_MSB, msg >> 8);
366 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
367 TWL4030_PM_MASTER_PB_WORD_LSB, msg & 0xff);
370 static void omap3_emu_romcode_call(u32 service_id, u32 *parameters)
372 u32 i, num_params = *parameters;
373 u32 *sram_scratch_space = (u32 *)OMAP3_PUBLIC_SRAM_SCRATCH_AREA;
376 * copy the parameters to an un-cached area to avoid coherency
379 for (i = 0; i < num_params; i++) {
380 __raw_writel(*parameters, sram_scratch_space);
382 sram_scratch_space++;
385 /* Now make the PPA call */
386 do_omap3_emu_romcode_call(service_id, OMAP3_PUBLIC_SRAM_SCRATCH_AREA);
389 void omap3_set_aux_cr_secure(u32 acr)
391 struct emu_hal_params_rx51 emu_romcode_params = { 0, };
393 emu_romcode_params.num_params = 2;
394 emu_romcode_params.param1 = acr;
396 omap3_emu_romcode_call(OMAP3_EMU_HAL_API_WRITE_ACR,
397 (u32 *)&emu_romcode_params);
401 * Routine: omap3_update_aux_cr_secure_rx51
402 * Description: Modify the contents Auxiliary Control Register.
404 * set_bits - bits to set in ACR
405 * clr_bits - bits to clear in ACR
407 static void omap3_update_aux_cr_secure_rx51(u32 set_bits, u32 clear_bits)
412 asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
415 omap3_set_aux_cr_secure(acr);
419 * Routine: misc_init_r
420 * Description: Configure board specific parts.
422 int misc_init_r(void)
428 /* disable lp5523 led */
429 if (i2c_get_chip_for_busnum(1, 0x32, 1, &dev) == 0)
430 dm_i2c_reg_write(dev, 0x00, 0x00);
432 /* initialize twl4030 power managment */
433 twl4030_power_init();
434 twl4030_power_mmc_init(0);
435 twl4030_power_mmc_init(1);
437 /* set VSIM to 1.8V */
438 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VSIM_DEDICATED,
439 TWL4030_PM_RECEIVER_VSIM_VSEL_18,
440 TWL4030_PM_RECEIVER_VSIM_DEV_GRP,
441 TWL4030_PM_RECEIVER_DEV_GRP_P1);
443 /* store I2C access state */
444 twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
447 /* enable I2C access to powerbus (needed for twl4030 regulator) */
448 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
451 /* set VAUX3, VSIM and VMMC1 state to active - enable eMMC memory */
452 twl4030_regulator_set_mode(RES_VAUX3, RES_STATE_ACTIVE);
453 twl4030_regulator_set_mode(RES_VSIM, RES_STATE_ACTIVE);
454 twl4030_regulator_set_mode(RES_VMMC1, RES_STATE_ACTIVE);
456 /* restore I2C access state */
457 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
460 /* set env variable attkernaddr for relocated kernel */
461 sprintf(buf, "%#x", KERNEL_ADDRESS);
462 env_set("attkernaddr", buf);
464 /* initialize omap tags */
467 /* reuse atags from previous bootloader */
470 omap_die_id_display();
474 * Cortex-A8(r1p0..r1p2) errata 430973 workaround
475 * Set IBE bit in Auxiliary Control Register
477 * Call this routine only on real secure device
478 * Qemu does not implement secure PPA and crash
480 if (get_device_type() == HS_DEVICE)
481 omap3_update_aux_cr_secure_rx51(1 << 6, 0);
486 static unsigned long int twl_wd_time; /* last time of watchdog reset */
487 static unsigned long int twl_i2c_lock;
490 * Routine: hw_watchdog_reset
491 * Description: Reset timeout of twl4030 watchdog.
493 void hw_watchdog_reset(void)
497 /* do not reset watchdog too often - max every 4s */
498 if (get_timer(twl_wd_time) < 4 * CONFIG_SYS_HZ)
501 /* localy lock twl4030 i2c bus */
502 if (test_and_set_bit(0, &twl_i2c_lock))
505 /* read actual watchdog timeout */
506 twl4030_i2c_read_u8(TWL4030_CHIP_PM_RECEIVER,
507 TWL4030_PM_RECEIVER_WATCHDOG_CFG, &timeout);
509 /* timeout 0 means watchdog is disabled */
510 /* reset watchdog timeout to 31s (maximum) */
512 twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
513 TWL4030_PM_RECEIVER_WATCHDOG_CFG, 31);
515 /* store last watchdog reset time */
516 twl_wd_time = get_timer(0);
518 /* localy unlock twl4030 i2c bus */
519 test_and_clear_bit(0, &twl_i2c_lock);
523 * TWL4030 keypad handler for cfb_console
526 static const char keymap[] = {
528 'q', 'o', 'p', ',', '\b', 0, 'a', 's',
529 'w', 'd', 'f', 'g', 'h', 'j', 'k', 'l',
530 'e', '.', 0, '\r', 0, 'z', 'x', 'c',
531 'r', 'v', 'b', 'n', 'm', ' ', ' ', 0,
532 't', 0, 0, 0, 0, 0, 0, 0,
533 'y', 0, 0, 0, 0, 0, 0, 0,
534 'u', 0, 0, 0, 0, 0, 0, 0,
535 'i', 5, 6, 0, 0, 0, 0, 0,
537 '1', '9', '0', '=', '\b', 0, '*', '+',
538 '2', '#', '-', '_', '(', ')', '&', '!',
539 '3', '?', '^', '\r', 0, 156, '$', 238,
540 '4', '/', '\\', '"', '\'', '@', 0, '<',
541 '5', '|', '>', 0, 0, 0, 0, 0,
542 '6', 0, 0, 0, 0, 0, 0, 0,
543 '7', 0, 0, 0, 0, 0, 0, 0,
544 '8', 16, 17, 0, 0, 0, 0, 0,
548 static u8 old_keys[8] = {0, 0, 0, 0, 0, 0, 0, 0};
549 #define KEYBUF_SIZE 32
550 static u8 keybuf[KEYBUF_SIZE];
551 static u8 keybuf_head;
552 static u8 keybuf_tail;
555 * Routine: rx51_kp_init
556 * Description: Initialize HW keyboard.
558 int rx51_kp_init(void)
562 ret = twl4030_i2c_read_u8(TWL4030_CHIP_KEYPAD,
563 TWL4030_KEYPAD_KEYP_CTRL_REG, &ctrl);
568 /* turn on keyboard and use hardware scanning */
569 ctrl |= TWL4030_KEYPAD_CTRL_KBD_ON;
570 ctrl |= TWL4030_KEYPAD_CTRL_SOFT_NRST;
571 ctrl |= TWL4030_KEYPAD_CTRL_SOFTMODEN;
572 ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
573 TWL4030_KEYPAD_KEYP_CTRL_REG, ctrl);
574 /* enable key event status */
575 ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
576 TWL4030_KEYPAD_KEYP_IMR1, 0xfe);
577 /* enable interrupt generation on rising and falling */
578 /* this is a workaround for qemu twl4030 emulation */
579 ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
580 TWL4030_KEYPAD_KEYP_EDR, 0x57);
581 /* enable ISR clear on read */
582 ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
583 TWL4030_KEYPAD_KEYP_SIH_CTRL, 0x05);
587 static void rx51_kp_fill(u8 k, u8 mods)
589 /* check if some cursor key without meta fn key was pressed */
590 if (!(mods & 2) && (k == 18 || k == 31 || k == 33 || k == 34)) {
591 keybuf[keybuf_tail++] = '\e';
592 keybuf_tail %= KEYBUF_SIZE;
593 keybuf[keybuf_tail++] = '[';
594 keybuf_tail %= KEYBUF_SIZE;
595 if (k == 18) /* up */
596 keybuf[keybuf_tail++] = 'A';
597 else if (k == 31) /* left */
598 keybuf[keybuf_tail++] = 'D';
599 else if (k == 33) /* down */
600 keybuf[keybuf_tail++] = 'B';
601 else if (k == 34) /* right */
602 keybuf[keybuf_tail++] = 'C';
603 keybuf_tail %= KEYBUF_SIZE;
607 if (mods & 2) { /* fn meta key was pressed */
611 if (mods & 1) { /* ctrl key was pressed */
612 if (k >= 'a' && k <= 'z')
615 if (mods & 4) { /* shift key was pressed */
616 if (k >= 'a' && k <= 'z')
624 keybuf[keybuf_tail++] = k;
625 keybuf_tail %= KEYBUF_SIZE;
629 * Routine: rx51_kp_tstc
630 * Description: Test if key was pressed (from buffer).
632 int rx51_kp_tstc(struct stdio_dev *sdev)
638 /* localy lock twl4030 i2c bus */
639 if (test_and_set_bit(0, &twl_i2c_lock))
642 /* twl4030 remembers up to 2 events */
643 for (i = 0; i < 2; i++) {
645 /* check interrupt register for events */
646 twl4030_i2c_read_u8(TWL4030_CHIP_KEYPAD,
647 TWL4030_KEYPAD_KEYP_ISR1 + (2 * i), &intr);
653 /* read the key state */
654 twl4030_i2c_read(TWL4030_CHIP_KEYPAD,
655 TWL4030_KEYPAD_FULL_CODE_7_0, keys, 8);
657 /* cut out modifier keys from the keystate */
661 for (c = 0; c < 8; c++) {
663 /* get newly pressed keys only */
664 dk = ((keys[c] ^ old_keys[c])&keys[c]);
665 old_keys[c] = keys[c];
667 /* fill the keybuf */
668 for (r = 0; r < 8; r++) {
670 rx51_kp_fill((c*8)+r, mods);
678 /* localy unlock twl4030 i2c bus */
679 test_and_clear_bit(0, &twl_i2c_lock);
681 return (KEYBUF_SIZE + keybuf_tail - keybuf_head)%KEYBUF_SIZE;
685 * Routine: rx51_kp_getc
686 * Description: Get last pressed key (from buffer).
688 int rx51_kp_getc(struct stdio_dev *sdev)
690 keybuf_head %= KEYBUF_SIZE;
691 while (!rx51_kp_tstc(sdev))
693 return keybuf[keybuf_head++];
696 static const struct mmc_config rx51_mmc_cfg = {
697 .host_caps = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS,
700 .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT,
701 .voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195,
704 static const struct omap_hsmmc_plat rx51_mmc[] = {
705 { rx51_mmc_cfg, (struct hsmmc *)OMAP_HSMMC1_BASE },
706 { rx51_mmc_cfg, (struct hsmmc *)OMAP_HSMMC2_BASE },
709 U_BOOT_DRVINFOS(rx51_mmc) = {
710 { "omap_hsmmc", &rx51_mmc[0] },
711 { "omap_hsmmc", &rx51_mmc[1] },
714 static const struct omap_i2c_plat rx51_i2c[] = {
715 { I2C_BASE1, 100000, OMAP_I2C_REV_V1 },
716 { I2C_BASE2, 100000, OMAP_I2C_REV_V1 },
717 { I2C_BASE3, 100000, OMAP_I2C_REV_V1 },
720 U_BOOT_DRVINFOS(rx51_i2c) = {
721 { "i2c_omap", &rx51_i2c[0] },
722 { "i2c_omap", &rx51_i2c[1] },
723 { "i2c_omap", &rx51_i2c[2] },