1 // SPDX-License-Identifier: GPL-2.0+
4 * Ивайло Димитров <freemangordon@abv.bg>
6 * (C) Copyright 2011-2012
7 * Pali Rohár <pali@kernel.org>
10 * Alistair Buxton <a.j.buxton@gmail.com>
12 * Derived from Beagle Board and 3430 SDP code:
13 * (C) Copyright 2004-2008
14 * Texas Instruments, <www.ti.com>
17 * Sunil Kumar <sunilsaini05@gmail.com>
18 * Shashi Ranjan <shashiranjanmca05@gmail.com>
20 * Richard Woodruff <r-woodruff2@ti.com>
21 * Syed Mohammed Khasim <khasim@ti.com>
34 #include <asm/setup.h>
35 #include <asm/bitops.h>
36 #include <asm/mach-types.h>
37 #include <asm/omap_i2c.h>
38 #include <asm/arch/mux.h>
39 #include <asm/arch/sys_proto.h>
40 #include <asm/arch/mmc_host_def.h>
45 DECLARE_GLOBAL_DATA_PTR;
49 const omap3_sysinfo sysinfo = {
55 /* This structure contains default omap tags needed for booting Maemo 5 */
56 static struct tag_omap omap[] = {
57 OMAP_TAG_UART_CONFIG(0x04),
58 OMAP_TAG_SERIAL_CONSOLE_CONFIG(0x03, 0x01C200),
59 OMAP_TAG_LCD_CONFIG("acx565akm", "internal", 90, 0x18),
60 OMAP_TAG_GPIO_SWITCH_CONFIG("cam_focus", 0x44, 0x1, 0x2, 0x0),
61 OMAP_TAG_GPIO_SWITCH_CONFIG("cam_launch", 0x45, 0x1, 0x2, 0x0),
62 OMAP_TAG_GPIO_SWITCH_CONFIG("cam_shutter", 0x6e, 0x1, 0x0, 0x0),
63 OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_apeslpx", 0x46, 0x2, 0x2, 0x0),
64 OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_bsi", 0x9d, 0x2, 0x2, 0x0),
65 OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_en", 0x4a, 0x2, 0x2, 0x0),
66 OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_rst", 0x4b, 0x6, 0x2, 0x0),
67 OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_rst_rq", 0x49, 0x6, 0x2, 0x0),
68 OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_wddis", 0x0d, 0x2, 0x2, 0x0),
69 OMAP_TAG_GPIO_SWITCH_CONFIG("headphone", 0xb1, 0x1, 0x1, 0x0),
70 OMAP_TAG_GPIO_SWITCH_CONFIG("kb_lock", 0x71, 0x1, 0x0, 0x0),
71 OMAP_TAG_GPIO_SWITCH_CONFIG("proximity", 0x59, 0x0, 0x0, 0x0),
72 OMAP_TAG_GPIO_SWITCH_CONFIG("sleep_ind", 0xa2, 0x2, 0x2, 0x0),
73 OMAP_TAG_GPIO_SWITCH_CONFIG("slide", GPIO_SLIDE, 0x0, 0x0, 0x0),
74 OMAP_TAG_WLAN_CX3110X_CONFIG(0x25, 0xff, 87, 42, -1),
75 OMAP_TAG_PARTITION_CONFIG("bootloader", 128 * 1024, 0x00000000, 0x00000003),
76 OMAP_TAG_PARTITION_CONFIG("config", 384 * 1024, 0x00020000, 0x00000000),
77 OMAP_TAG_PARTITION_CONFIG("log", 256 * 1024, 0x00080000, 0x00000000),
78 OMAP_TAG_PARTITION_CONFIG("kernel", 2 * 1024*1024, 0x000c0000, 0x00000000),
79 OMAP_TAG_PARTITION_CONFIG("initfs", 2 * 1024*1024, 0x002c0000, 0x00000000),
80 OMAP_TAG_PARTITION_CONFIG("rootfs", 257280 * 1024, 0x004c0000, 0x00000000),
81 OMAP_TAG_BOOT_REASON_CONFIG("pwr_key"),
82 OMAP_TAG_VERSION_STR_CONFIG("product", "RX-51"),
83 OMAP_TAG_VERSION_STR_CONFIG("hw-build", "2101"),
84 OMAP_TAG_VERSION_STR_CONFIG("nolo", "1.4.14"),
85 OMAP_TAG_VERSION_STR_CONFIG("boot-mode", "normal"),
89 static char *boot_reason_ptr;
90 static char *hw_build_ptr;
91 static char *nolo_version_ptr;
92 static char *boot_mode_ptr;
93 static int serial_was_console_enabled;
96 * Routine: init_omap_tags
97 * Description: Initialize pointers to values in tag_omap
99 static void init_omap_tags(void)
104 while (omap[i].hdr.tag) {
105 switch (omap[i].hdr.tag) {
106 case OMAP_TAG_BOOT_REASON:
107 boot_reason_ptr = omap[i].u.boot_reason.reason_str;
109 case OMAP_TAG_VERSION_STR:
110 component = omap[i].u.version.component;
111 version = omap[i].u.version.version;
112 if (strcmp(component, "hw-build") == 0)
113 hw_build_ptr = version;
114 else if (strcmp(component, "nolo") == 0)
115 nolo_version_ptr = version;
116 else if (strcmp(component, "boot-mode") == 0)
117 boot_mode_ptr = version;
126 static void reuse_omap_atags(struct tag_omap *t)
131 switch (t->hdr.tag) {
132 case OMAP_TAG_BOOT_REASON:
133 memset(boot_reason_ptr, 0, 12);
134 strcpy(boot_reason_ptr, t->u.boot_reason.reason_str);
136 case OMAP_TAG_VERSION_STR:
137 component = t->u.version.component;
138 version = t->u.version.version;
139 if (strcmp(component, "hw-build") == 0) {
140 memset(hw_build_ptr, 0, 12);
141 strcpy(hw_build_ptr, version);
142 } else if (strcmp(component, "nolo") == 0) {
143 memset(nolo_version_ptr, 0, 12);
144 strcpy(nolo_version_ptr, version);
145 } else if (strcmp(component, "boot-mode") == 0) {
146 memset(boot_mode_ptr, 0, 12);
147 strcpy(boot_mode_ptr, version);
151 if (t->u.uart.enabled_uarts)
152 serial_was_console_enabled = 1;
154 case OMAP_TAG_SERIAL_CONSOLE:
155 serial_was_console_enabled = 1;
160 t = tag_omap_next(t);
165 * Routine: reuse_atags
166 * Description: Reuse atags from previous bootloader.
167 * Reuse only only HW build, boot reason, boot mode and nolo
169 static void reuse_atags(void)
171 struct tag *t = (struct tag *)gd->bd->bi_boot_params;
173 /* First tag must be ATAG_CORE */
174 if (t->hdr.tag != ATAG_CORE)
177 if (!boot_reason_ptr || !hw_build_ptr)
180 /* Last tag must be ATAG_NONE */
181 while (t->hdr.tag != ATAG_NONE) {
182 switch (t->hdr.tag) {
184 memset(hw_build_ptr, 0, 12);
185 sprintf(hw_build_ptr, "%x", t->u.revision.rev);
188 reuse_omap_atags((struct tag_omap *)&t->u);
198 * Routine: board_init
199 * Description: Early hardware init.
203 #if defined(CONFIG_CMD_ONENAND)
204 const u32 gpmc_regs_onenandrx51[GPMC_MAX_REG] = {
205 ONENAND_GPMC_CONFIG1_RX51,
206 ONENAND_GPMC_CONFIG2_RX51,
207 ONENAND_GPMC_CONFIG3_RX51,
208 ONENAND_GPMC_CONFIG4_RX51,
209 ONENAND_GPMC_CONFIG5_RX51,
210 ONENAND_GPMC_CONFIG6_RX51,
214 /* in SRAM or SDRAM, finish GPMC */
216 #if defined(CONFIG_CMD_ONENAND)
217 enable_gpmc_cs_config(gpmc_regs_onenandrx51, &gpmc_cfg->cs[0],
218 CONFIG_SYS_ONENAND_BASE, GPMC_SIZE_256M);
220 /* Enable the clks & power */
222 /* boot param addr */
223 gd->bd->bi_boot_params = OMAP34XX_SDRC_CS0 + 0x100;
228 * Routine: get_board_revision
229 * Description: Return board revision.
231 u32 get_board_rev(void)
233 return simple_strtol(hw_build_ptr, NULL, 16);
237 * Routine: setup_board_tags
238 * Description: Append board specific boot tags.
240 void setup_board_tags(struct tag **in_params)
242 int setup_console_atag;
243 char *setup_boot_reason_atag;
244 char *setup_boot_mode_atag;
252 params = (struct tag *)gd->bd->bi_boot_params;
254 params->u.core.flags = 0x0;
255 params->u.core.pagesize = 0x1000;
256 params->u.core.rootdev = 0x0;
258 /* append omap atag only if env setup_omap_atag is set to 1 */
259 str = env_get("setup_omap_atag");
260 if (!str || str[0] != '1')
263 str = env_get("setup_console_atag");
266 setup_console_atag = 1;
268 setup_console_atag = 0;
270 if (serial_was_console_enabled)
271 setup_console_atag = 1;
273 setup_console_atag = 0;
276 setup_boot_reason_atag = env_get("setup_boot_reason_atag");
277 setup_boot_mode_atag = env_get("setup_boot_mode_atag");
280 t = (struct tag_omap *)¶ms->u;
281 total_size = sizeof(struct tag_header);
283 for (i = 0; omap[i].hdr.tag; i++) {
285 /* skip serial console tag */
286 if (!setup_console_atag &&
287 omap[i].hdr.tag == OMAP_TAG_SERIAL_CONSOLE)
290 size = omap[i].hdr.size + sizeof(struct tag_omap_header);
291 memcpy(t, &omap[i], size);
293 /* set uart tag to 0 - disable serial console */
294 if (!setup_console_atag && omap[i].hdr.tag == OMAP_TAG_UART)
295 t->u.uart.enabled_uarts = 0;
297 /* change boot reason */
298 if (setup_boot_reason_atag &&
299 omap[i].hdr.tag == OMAP_TAG_BOOT_REASON) {
300 memset(t->u.boot_reason.reason_str, 0, 12);
301 strcpy(t->u.boot_reason.reason_str,
302 setup_boot_reason_atag);
305 /* change boot mode */
306 if (setup_boot_mode_atag &&
307 omap[i].hdr.tag == OMAP_TAG_VERSION_STR &&
308 strcmp(omap[i].u.version.component, "boot-mode") == 0) {
309 memset(t->u.version.version, 0, 12);
310 strcpy(t->u.version.version, setup_boot_mode_atag);
314 t = tag_omap_next(t);
318 params->hdr.tag = ATAG_BOARD;
319 params->hdr.size = total_size >> 2;
320 params = tag_next(params);
326 * Routine: video_hw_init
327 * Description: Set up the GraphicDevice depending on sys_boot.
329 void *video_hw_init(void)
331 /* fill in Graphic Device */
332 gdev.frameAdrs = 0x8f9c0000;
336 gdev.gdfIndex = GDF_16BIT_565RGB;
337 memset((void *)gdev.frameAdrs, 0, 0xbb800);
338 return (void *) &gdev;
342 * Routine: twl4030_regulator_set_mode
343 * Description: Set twl4030 regulator mode over i2c powerbus.
345 static void twl4030_regulator_set_mode(u8 id, u8 mode)
347 u16 msg = MSG_SINGULAR(DEV_GRP_P1, id, mode);
348 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
349 TWL4030_PM_MASTER_PB_WORD_MSB, msg >> 8);
350 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
351 TWL4030_PM_MASTER_PB_WORD_LSB, msg & 0xff);
354 static void omap3_emu_romcode_call(u32 service_id, u32 *parameters)
356 u32 i, num_params = *parameters;
357 u32 *sram_scratch_space = (u32 *)OMAP3_PUBLIC_SRAM_SCRATCH_AREA;
360 * copy the parameters to an un-cached area to avoid coherency
363 for (i = 0; i < num_params; i++) {
364 __raw_writel(*parameters, sram_scratch_space);
366 sram_scratch_space++;
369 /* Now make the PPA call */
370 do_omap3_emu_romcode_call(service_id, OMAP3_PUBLIC_SRAM_SCRATCH_AREA);
373 void omap3_set_aux_cr_secure(u32 acr)
375 struct emu_hal_params_rx51 emu_romcode_params = { 0, };
377 emu_romcode_params.num_params = 2;
378 emu_romcode_params.param1 = acr;
380 omap3_emu_romcode_call(OMAP3_EMU_HAL_API_WRITE_ACR,
381 (u32 *)&emu_romcode_params);
385 * Routine: omap3_update_aux_cr_secure_rx51
386 * Description: Modify the contents Auxiliary Control Register.
388 * set_bits - bits to set in ACR
389 * clr_bits - bits to clear in ACR
391 static void omap3_update_aux_cr_secure_rx51(u32 set_bits, u32 clear_bits)
396 asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
399 omap3_set_aux_cr_secure(acr);
403 * Routine: misc_init_r
404 * Description: Configure board specific parts.
406 int misc_init_r(void)
412 /* disable lp5523 led */
413 if (i2c_get_chip_for_busnum(1, 0x32, 1, &dev) == 0)
414 dm_i2c_reg_write(dev, 0x00, 0x00);
416 /* initialize twl4030 power managment */
417 twl4030_power_init();
419 /* set VSIM to 1.8V */
420 twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VSIM_DEDICATED,
421 TWL4030_PM_RECEIVER_VSIM_VSEL_18,
422 TWL4030_PM_RECEIVER_VSIM_DEV_GRP,
423 TWL4030_PM_RECEIVER_DEV_GRP_P1);
425 /* store I2C access state */
426 twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
429 /* enable I2C access to powerbus (needed for twl4030 regulator) */
430 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
433 /* set VAUX3, VSIM and VMMC1 state to active - enable eMMC memory */
434 twl4030_regulator_set_mode(RES_VAUX3, RES_STATE_ACTIVE);
435 twl4030_regulator_set_mode(RES_VSIM, RES_STATE_ACTIVE);
436 twl4030_regulator_set_mode(RES_VMMC1, RES_STATE_ACTIVE);
438 /* restore I2C access state */
439 twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
442 /* set env variable attkernaddr for relocated kernel */
443 sprintf(buf, "%#x", KERNEL_ADDRESS);
444 env_set("attkernaddr", buf);
446 /* initialize omap tags */
449 /* reuse atags from previous bootloader */
452 omap_die_id_display();
456 * Cortex-A8(r1p0..r1p2) errata 430973 workaround
457 * Set IBE bit in Auxiliary Control Register
459 * Call this routine only on real secure device
460 * Qemu does not implement secure PPA and crash
462 if (get_device_type() == HS_DEVICE)
463 omap3_update_aux_cr_secure_rx51(1 << 6, 0);
469 * Routine: set_muxconf_regs
470 * Description: Setting up the configuration Mux registers specific to the
471 * hardware. Many pins need to be moved from protect to primary
474 void set_muxconf_regs(void)
479 static unsigned long int twl_wd_time; /* last time of watchdog reset */
480 static unsigned long int twl_i2c_lock;
483 * Routine: hw_watchdog_reset
484 * Description: Reset timeout of twl4030 watchdog.
486 void hw_watchdog_reset(void)
490 /* do not reset watchdog too often - max every 4s */
491 if (get_timer(twl_wd_time) < 4 * CONFIG_SYS_HZ)
494 /* localy lock twl4030 i2c bus */
495 if (test_and_set_bit(0, &twl_i2c_lock))
498 /* read actual watchdog timeout */
499 twl4030_i2c_read_u8(TWL4030_CHIP_PM_RECEIVER,
500 TWL4030_PM_RECEIVER_WATCHDOG_CFG, &timeout);
502 /* timeout 0 means watchdog is disabled */
503 /* reset watchdog timeout to 31s (maximum) */
505 twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
506 TWL4030_PM_RECEIVER_WATCHDOG_CFG, 31);
508 /* store last watchdog reset time */
509 twl_wd_time = get_timer(0);
511 /* localy unlock twl4030 i2c bus */
512 test_and_clear_bit(0, &twl_i2c_lock);
516 * TWL4030 keypad handler for cfb_console
519 static const char keymap[] = {
521 'q', 'o', 'p', ',', '\b', 0, 'a', 's',
522 'w', 'd', 'f', 'g', 'h', 'j', 'k', 'l',
523 'e', '.', 0, '\r', 0, 'z', 'x', 'c',
524 'r', 'v', 'b', 'n', 'm', ' ', ' ', 0,
525 't', 0, 0, 0, 0, 0, 0, 0,
526 'y', 0, 0, 0, 0, 0, 0, 0,
527 'u', 0, 0, 0, 0, 0, 0, 0,
528 'i', 5, 6, 0, 0, 0, 0, 0,
530 '1', '9', '0', '=', '\b', 0, '*', '+',
531 '2', '#', '-', '_', '(', ')', '&', '!',
532 '3', '?', '^', '\r', 0, 156, '$', 238,
533 '4', '/', '\\', '"', '\'', '@', 0, '<',
534 '5', '|', '>', 0, 0, 0, 0, 0,
535 '6', 0, 0, 0, 0, 0, 0, 0,
536 '7', 0, 0, 0, 0, 0, 0, 0,
537 '8', 16, 17, 0, 0, 0, 0, 0,
541 static u8 old_keys[8] = {0, 0, 0, 0, 0, 0, 0, 0};
542 #define KEYBUF_SIZE 32
543 static u8 keybuf[KEYBUF_SIZE];
544 static u8 keybuf_head;
545 static u8 keybuf_tail;
548 * Routine: rx51_kp_init
549 * Description: Initialize HW keyboard.
551 int rx51_kp_init(void)
555 ret = twl4030_i2c_read_u8(TWL4030_CHIP_KEYPAD,
556 TWL4030_KEYPAD_KEYP_CTRL_REG, &ctrl);
561 /* turn on keyboard and use hardware scanning */
562 ctrl |= TWL4030_KEYPAD_CTRL_KBD_ON;
563 ctrl |= TWL4030_KEYPAD_CTRL_SOFT_NRST;
564 ctrl |= TWL4030_KEYPAD_CTRL_SOFTMODEN;
565 ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
566 TWL4030_KEYPAD_KEYP_CTRL_REG, ctrl);
567 /* enable key event status */
568 ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
569 TWL4030_KEYPAD_KEYP_IMR1, 0xfe);
570 /* enable interrupt generation on rising and falling */
571 /* this is a workaround for qemu twl4030 emulation */
572 ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
573 TWL4030_KEYPAD_KEYP_EDR, 0x57);
574 /* enable ISR clear on read */
575 ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
576 TWL4030_KEYPAD_KEYP_SIH_CTRL, 0x05);
580 static void rx51_kp_fill(u8 k, u8 mods)
582 /* check if some cursor key without meta fn key was pressed */
583 if (!(mods & 2) && (k == 18 || k == 31 || k == 33 || k == 34)) {
584 keybuf[keybuf_tail++] = '\e';
585 keybuf_tail %= KEYBUF_SIZE;
586 keybuf[keybuf_tail++] = '[';
587 keybuf_tail %= KEYBUF_SIZE;
588 if (k == 18) /* up */
589 keybuf[keybuf_tail++] = 'A';
590 else if (k == 31) /* left */
591 keybuf[keybuf_tail++] = 'D';
592 else if (k == 33) /* down */
593 keybuf[keybuf_tail++] = 'B';
594 else if (k == 34) /* right */
595 keybuf[keybuf_tail++] = 'C';
596 keybuf_tail %= KEYBUF_SIZE;
600 if (mods & 2) { /* fn meta key was pressed */
604 if (mods & 1) { /* ctrl key was pressed */
605 if (k >= 'a' && k <= 'z')
608 if (mods & 4) { /* shift key was pressed */
609 if (k >= 'a' && k <= 'z')
617 keybuf[keybuf_tail++] = k;
618 keybuf_tail %= KEYBUF_SIZE;
622 * Routine: rx51_kp_tstc
623 * Description: Test if key was pressed (from buffer).
625 int rx51_kp_tstc(struct stdio_dev *sdev)
631 /* localy lock twl4030 i2c bus */
632 if (test_and_set_bit(0, &twl_i2c_lock))
635 /* twl4030 remembers up to 2 events */
636 for (i = 0; i < 2; i++) {
638 /* check interrupt register for events */
639 twl4030_i2c_read_u8(TWL4030_CHIP_KEYPAD,
640 TWL4030_KEYPAD_KEYP_ISR1 + (2 * i), &intr);
646 /* read the key state */
647 twl4030_i2c_read(TWL4030_CHIP_KEYPAD,
648 TWL4030_KEYPAD_FULL_CODE_7_0, keys, 8);
650 /* cut out modifier keys from the keystate */
654 for (c = 0; c < 8; c++) {
656 /* get newly pressed keys only */
657 dk = ((keys[c] ^ old_keys[c])&keys[c]);
658 old_keys[c] = keys[c];
660 /* fill the keybuf */
661 for (r = 0; r < 8; r++) {
663 rx51_kp_fill((c*8)+r, mods);
671 /* localy unlock twl4030 i2c bus */
672 test_and_clear_bit(0, &twl_i2c_lock);
674 return (KEYBUF_SIZE + keybuf_tail - keybuf_head)%KEYBUF_SIZE;
678 * Routine: rx51_kp_getc
679 * Description: Get last pressed key (from buffer).
681 int rx51_kp_getc(struct stdio_dev *sdev)
683 keybuf_head %= KEYBUF_SIZE;
684 while (!rx51_kp_tstc(sdev))
686 return keybuf[keybuf_head++];
690 * Routine: board_mmc_init
691 * Description: Initialize mmc devices.
693 int board_mmc_init(struct bd_info *bis)
695 omap_mmc_init(0, 0, 0, -1, -1);
696 omap_mmc_init(1, 0, 0, -1, -1);
700 void board_mmc_power_init(void)
702 twl4030_power_mmc_init(0);
703 twl4030_power_mmc_init(1);
706 static const struct omap_i2c_platdata rx51_i2c[] = {
707 { I2C_BASE1, 2200000, OMAP_I2C_REV_V1 },
708 { I2C_BASE2, 100000, OMAP_I2C_REV_V1 },
709 { I2C_BASE3, 400000, OMAP_I2C_REV_V1 },
712 U_BOOT_DEVICES(rx51_i2c) = {
713 { "i2c_omap", &rx51_i2c[0] },
714 { "i2c_omap", &rx51_i2c[1] },
715 { "i2c_omap", &rx51_i2c[2] },