1 /*-----------------------------------------------------------------------------+
3 | This source code has been made available to you by IBM on an AS-IS
4 | basis. Anyone receiving this source is licensed under IBM
5 | copyrights to use it in any way he or she deems fit, including
6 | copying it, modifying it, compiling it, and redistributing it either
7 | with or without modifications. No license under IBM patents or
8 | patent applications is to be implied by the copyright license.
10 | Any user of this software should understand that IBM cannot provide
11 | technical support for this software and will not be responsible for
12 | any consequences resulting from the use of this software.
14 | Any person who transfers this source code or any derivative work
15 | must include the IBM copyright notice, this paragraph, and the
16 | preceding two paragraphs in the transferred software.
18 | COPYRIGHT I B M CORPORATION 1995
19 | LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
20 +-----------------------------------------------------------------------------*/
22 * Adapted for PIP405 03.07.01
23 * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
35 DECLARE_GLOBAL_DATA_PTR;
37 #include "piix4_pci.h"
38 #include "pci_parts.h"
40 void pci_pip405_write_regs(struct pci_controller *hose, pci_dev_t dev,
41 struct pci_config_table *entry)
43 struct pci_pip405_config_entry *table;
46 table = (struct pci_pip405_config_entry*) entry->priv[0];
48 for (i=0; table[i].width; i++)
51 printf("Reg 0x%02X Value 0x%08lX Width %02d written\n",
52 table[i].index, table[i].val, table[i].width);
55 switch(table[i].width)
57 case 1: pci_hose_write_config_byte(hose, dev, table[i].index, table[i].val); break;
58 case 2: pci_hose_write_config_word(hose, dev, table[i].index, table[i].val); break;
59 case 4: pci_hose_write_config_dword(hose, dev, table[i].index, table[i].val); break;
65 static void pci_pip405_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
67 unsigned char int_line = 0xff;
70 * Write pci interrupt line register
72 if(PCI_DEV(dev)==0) /* Device0 = PPC405 -> skip */
74 pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &pin);
75 if ((pin == 0) || (pin > 4))
78 int_line = ((PCI_DEV(dev) + (pin-1) + 10) % 4) + 28;
79 pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, int_line);
81 printf("Fixup IRQ: dev %d (%x) int line %d 0x%x\n",
82 PCI_DEV(dev),dev,int_line,int_line);
86 extern void pci_405gp_init(struct pci_controller *hose);
89 static struct pci_controller hose = {
90 config_table: pci_pip405_config_table,
91 fixup_irq: pci_pip405_fixup_irq,
95 static void reloc_pci_cfg_table(struct pci_config_table *table)
99 for (; table && table->vendor; table++) {
100 addr = (ulong) (table->config_device) + gd->reloc_off;
102 printf ("device \"%d\": 0x%08lx => 0x%08lx\n",
103 table->device, (ulong) (table->config_device), addr);
105 table->config_device =
106 (void (*)(struct pci_controller* hose, pci_dev_t dev,
107 struct pci_config_table *))addr;
108 table->priv[0]+=gd->reloc_off;
112 void pci_init_board(void)
114 /*we want the ptrs to RAM not flash (ie don't use init list)*/
115 hose.fixup_irq = pci_pip405_fixup_irq;
116 hose.config_table = pci_pip405_config_table;
117 reloc_pci_cfg_table(hose.config_table);
119 printf("Init PCI: fixup_irq=%p config_table=%p hose=%p\n",pci_pip405_fixup_irq,pci_pip405_config_table,hose);
121 pci_405gp_init(&hose);
124 #endif /* CONFIG_PCI */
125 #endif /* CONFIG_405GP */