2 * (C) Copyright 2000, 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * Wait for completion of each sector erase command issued
28 * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
33 * - adapted for pip405, Denis Peter, MPL AG Switzerland
40 #include <asm/processor.h>
41 #include "common_util.h"
42 #if defined(CONFIG_MIP405)
43 #include "../mip405/mip405.h"
45 #if defined(CONFIG_PIP405)
46 #include "../pip405/pip405.h"
48 #include <405gp_pci.h>
50 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
51 /*-----------------------------------------------------------------------
54 static ulong flash_get_size (vu_long *addr, flash_info_t *info);
55 static int write_word (flash_info_t *info, ulong dest, ulong data);
57 void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt);
63 #define FLASH_WORD_SIZE unsigned short
69 #define FLASH_WORD_SIZE unsigned short
75 /*-----------------------------------------------------------------------
76 * Some CS switching routines:
78 * On PIP/MIP405 we have 3 (4) possible boot mode
80 * - Boot from Flash (Flash CS = CS0, MPS CS = CS1)
81 * - Boot from MPS (Flash CS = CS1, MPS CS = CS0)
82 * - Boot from PCI with Flash map (Flash CS = CS0, MPS CS = CS1)
83 * - Boot from PCI with MPS map (Flash CS = CS1, MPS CS = CS0)
84 * The flash init is the first board specific routine which is called
85 * after code relocation (running from SDRAM)
86 * The first thing we do is to map the Flash CS to the Flash area and
87 * the MPS CS to the MPS area. Since the flash size is unknown at this
88 * point, we use the max flash size and the lowest flash address as base.
90 * After flash detection we adjust the size of the CS area accordingly.
91 * The board_init_r will fill in wrong values in the board init structure,
92 * but this will be fixed in the misc_init_r routine:
93 * bd->bi_flashstart=0-flash_info[0].size
94 * bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN
95 * bd->bi_flashoffset=0
98 int get_boot_mode(void)
102 pbcr = mfdcr (strap);
103 if ((pbcr & PSR_ROM_WIDTH_MASK) == 0)
104 /* boot via MPS or MPS mapping */
106 if(pbcr & PSR_ROM_LOC)
112 /* Map the flash high (in boot area)
113 This code can only be executed from SDRAM (after relocation).
115 void setup_cs_reloc(void)
118 /* Since we are relocated, we can set-up the CS finaly
119 * but first of all, switch off PCI mapping (in case it was a PCI boot) */
121 icache_enable (); /* we are relocated */
123 mode=get_boot_mode();
124 /* we map the flash high in every case */
125 /* first findout on which cs the flash is */
126 if(mode & BOOT_MPS) {
127 /* map flash high on CS1 and MPS on CS0 */
128 mtdcr (ebccfga, pb0ap);
129 mtdcr (ebccfgd, MPS_AP);
130 mtdcr (ebccfga, pb0cr);
131 mtdcr (ebccfgd, MPS_CR);
132 /* we use the default values (max values) for the flash
133 * because its real size is not yet known */
134 mtdcr (ebccfga, pb1ap);
135 mtdcr (ebccfgd, FLASH_AP);
136 mtdcr (ebccfga, pb1cr);
137 mtdcr (ebccfgd, FLASH_CR_B);
140 /* map flash high on CS0 and MPS on CS1 */
141 mtdcr (ebccfga, pb1ap);
142 mtdcr (ebccfgd, MPS_AP);
143 mtdcr (ebccfga, pb1cr);
144 mtdcr (ebccfgd, MPS_CR);
145 /* we use the default values (max values) for the flash
146 * because its real size is not yet known */
147 mtdcr (ebccfga, pb0ap);
148 mtdcr (ebccfgd, FLASH_AP);
149 mtdcr (ebccfga, pb0cr);
150 mtdcr (ebccfgd, FLASH_CR_B);
155 unsigned long flash_init (void)
157 unsigned long size_b0, size_b1,flashcr, size_reg;
159 extern char version_string;
160 char *p=&version_string;
162 /* Since we are relocated, we can set-up the CS finally */
164 /* get and display boot mode */
165 mode=get_boot_mode();
167 printf("(PCI Boot %s Map) ",(mode & BOOT_MPS) ?
170 printf("(%s Boot) ",(mode & BOOT_MPS) ?
172 /* Init: no FLASHes known */
173 for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
174 flash_info[i].flash_id = FLASH_UNKNOWN;
177 /* Static FLASH Bank configuration here - FIXME XXX */
179 size_b0 = flash_get_size((vu_long *)CFG_MONITOR_BASE, &flash_info[0]);
181 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
182 printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
183 size_b0, size_b0<<20);
185 /* protect the bootloader */
186 /* Monitor protection ON by default */
187 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
188 flash_protect(FLAG_PROTECT_SET,
190 CFG_MONITOR_BASE+monitor_flash_len-1,
193 /* protect reset vector */
194 flash_info[0].protect[flash_info[0].sector_count-1] = 1;
196 flash_info[0].size = size_b0;
197 /* set up flash cs according to the size */
198 size_reg=(flash_info[0].size >>20);
201 case 1: i=0; break; /* <= 1MB */
202 case 2: i=1; break; /* = 2MB */
203 case 4: i=2; break; /* = 4MB */
204 case 8: i=3; break; /* = 8MB */
205 case 16: i=4; break; /* = 16MB */
206 case 32: i=5; break; /* = 32MB */
207 case 64: i=6; break; /* = 64MB */
208 case 128: i=7; break; /*= 128MB */
210 printf("\n #### ERROR, wrong size %ld MByte reset board #####\n",size_reg);
213 if(mode & BOOT_MPS) {
214 /* flash is on CS1 */
215 mtdcr(ebccfga, pb1cr);
216 flashcr = mfdcr (ebccfgd);
217 /* we map the flash high in every case */
218 flashcr&=0x0001FFFF; /* mask out address bits */
219 flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
220 flashcr|= (i << 17); /* size addr */
221 mtdcr(ebccfga, pb1cr);
222 mtdcr(ebccfgd, flashcr);
225 /* flash is on CS0 */
226 mtdcr(ebccfga, pb0cr);
227 flashcr = mfdcr (ebccfgd);
228 /* we map the flash high in every case */
229 flashcr&=0x0001FFFF; /* mask out address bits */
230 flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
231 flashcr|= (i << 17); /* size addr */
232 mtdcr(ebccfga, pb0cr);
233 mtdcr(ebccfgd, flashcr);
236 /* enable this if you want to test if
237 the relocation has be done ok.
238 This will disable both Chipselects */
239 mtdcr (ebccfga, pb0cr);
241 mtdcr (ebccfga, pb1cr);
243 printf("CS0 & CS1 switched off for test\n");
245 /* patch version_string */
246 for(i=0;i<0x100;i++) {
257 /*-----------------------------------------------------------------------
259 void flash_print_info (flash_info_t *info)
265 volatile unsigned long *flash;
267 if (info->flash_id == FLASH_UNKNOWN) {
268 printf ("missing or unknown FLASH type\n");
272 switch (info->flash_id & FLASH_VENDMASK) {
273 case FLASH_MAN_AMD: printf ("AMD "); break;
274 case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
275 case FLASH_MAN_SST: printf ("SST "); break;
276 case FLASH_MAN_INTEL: printf ("Intel "); break;
277 default: printf ("Unknown Vendor "); break;
280 switch (info->flash_id & FLASH_TYPEMASK) {
281 case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n");
283 case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
285 case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
287 case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
289 case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
291 case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
293 case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
295 case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
297 case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
299 case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
301 case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
303 case FLASH_INTEL320T: printf ("TE28F320C3 (32 Mbit, top sector size)\n");
305 case FLASH_AM640U: printf ("AM29LV640U (64 Mbit, uniform sector size)\n");
307 default: printf ("Unknown Chip Type\n");
311 printf (" Size: %ld KB in %d Sectors\n",
312 info->size >> 10, info->sector_count);
314 printf (" Sector Start Addresses:");
315 for (i=0; i<info->sector_count; ++i) {
317 * Check if whole sector is erased
319 if (i != (info->sector_count-1))
320 size = info->start[i+1] - info->start[i];
322 size = info->start[0] + info->size - info->start[i];
324 flash = (volatile unsigned long *)info->start[i];
325 size = size >> 2; /* divide by 4 for longword access */
326 for (k=0; k<size; k++) {
327 if (*flash++ != 0xffffffff) {
334 printf (" %08lX%s%s",
337 info->protect[i] ? "RO " : " ");
342 /*-----------------------------------------------------------------------
346 /*-----------------------------------------------------------------------
351 * The following code cannot be run from FLASH!
353 static ulong flash_get_size (vu_long *addr, flash_info_t *info)
356 FLASH_WORD_SIZE value;
358 volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
360 /* Write auto select command: read Manufacturer ID */
361 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
362 addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
363 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
366 /* printf("flash_get_size value: %x\n",value); */
368 case (FLASH_WORD_SIZE)AMD_MANUFACT:
369 info->flash_id = FLASH_MAN_AMD;
371 case (FLASH_WORD_SIZE)FUJ_MANUFACT:
372 info->flash_id = FLASH_MAN_FUJ;
374 case (FLASH_WORD_SIZE)INTEL_MANUFACT:
375 info->flash_id = FLASH_MAN_INTEL;
377 case (FLASH_WORD_SIZE)SST_MANUFACT:
378 info->flash_id = FLASH_MAN_SST;
381 info->flash_id = FLASH_UNKNOWN;
382 info->sector_count = 0;
384 return (0); /* no or unknown flash */
386 value = addr2[1]; /* device ID */
387 /* printf("Device value %x\n",value); */
389 case (FLASH_WORD_SIZE)AMD_ID_F040B:
390 info->flash_id += FLASH_AM040;
391 info->sector_count = 8;
392 info->size = 0x0080000; /* => 512 ko */
394 case (FLASH_WORD_SIZE)AMD_ID_LV400T:
395 info->flash_id += FLASH_AM400T;
396 info->sector_count = 11;
397 info->size = 0x00080000;
398 break; /* => 0.5 MB */
400 case (FLASH_WORD_SIZE)AMD_ID_LV400B:
401 info->flash_id += FLASH_AM400B;
402 info->sector_count = 11;
403 info->size = 0x00080000;
404 break; /* => 0.5 MB */
406 case (FLASH_WORD_SIZE)AMD_ID_LV800T:
407 info->flash_id += FLASH_AM800T;
408 info->sector_count = 19;
409 info->size = 0x00100000;
412 case (FLASH_WORD_SIZE)AMD_ID_LV800B:
413 info->flash_id += FLASH_AM800B;
414 info->sector_count = 19;
415 info->size = 0x00100000;
418 case (FLASH_WORD_SIZE)AMD_ID_LV160T:
419 info->flash_id += FLASH_AM160T;
420 info->sector_count = 35;
421 info->size = 0x00200000;
424 case (FLASH_WORD_SIZE)AMD_ID_LV160B:
425 info->flash_id += FLASH_AM160B;
426 info->sector_count = 35;
427 info->size = 0x00200000;
429 case (FLASH_WORD_SIZE)AMD_ID_LV320T:
430 info->flash_id += FLASH_AM320T;
431 info->sector_count = 67;
432 info->size = 0x00400000;
434 case (FLASH_WORD_SIZE)AMD_ID_LV640U:
435 info->flash_id += FLASH_AM640U;
436 info->sector_count = 128;
437 info->size = 0x00800000;
439 #if 0 /* enable when device IDs are available */
441 case (FLASH_WORD_SIZE)AMD_ID_LV320B:
442 info->flash_id += FLASH_AM320B;
443 info->sector_count = 67;
444 info->size = 0x00400000;
447 case (FLASH_WORD_SIZE)SST_ID_xF800A:
448 info->flash_id += FLASH_SST800A;
449 info->sector_count = 16;
450 info->size = 0x00100000;
452 case (FLASH_WORD_SIZE)INTEL_ID_28F320C3T:
453 info->flash_id += FLASH_INTEL320T;
454 info->sector_count = 71;
455 info->size = 0x00400000;
459 case (FLASH_WORD_SIZE)SST_ID_xF160A:
460 info->flash_id += FLASH_SST160A;
461 info->sector_count = 32;
462 info->size = 0x00200000;
466 info->flash_id = FLASH_UNKNOWN;
467 return (0); /* => no or unknown flash */
470 /* base address calculation */
472 /* set up sector start address table */
473 if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
474 (info->flash_id == FLASH_AM040) ||
475 (info->flash_id == FLASH_AM640U)){
476 for (i = 0; i < info->sector_count; i++)
477 info->start[i] = base + (i * 0x00010000);
480 if (info->flash_id & FLASH_BTYPE) {
481 /* set sector offsets for bottom boot block type */
482 info->start[0] = base + 0x00000000;
483 info->start[1] = base + 0x00004000;
484 info->start[2] = base + 0x00006000;
485 info->start[3] = base + 0x00008000;
486 for (i = 4; i < info->sector_count; i++)
487 info->start[i] = base + (i * 0x00010000) - 0x00030000;
490 /* set sector offsets for top boot block type */
491 i = info->sector_count - 1;
492 if(info->sector_count==71) {
494 info->start[i--] = base + info->size - 0x00002000;
495 info->start[i--] = base + info->size - 0x00004000;
496 info->start[i--] = base + info->size - 0x00006000;
497 info->start[i--] = base + info->size - 0x00008000;
498 info->start[i--] = base + info->size - 0x0000A000;
499 info->start[i--] = base + info->size - 0x0000C000;
500 info->start[i--] = base + info->size - 0x0000E000;
502 info->start[i] = base + i * 0x000010000;
505 info->start[i--] = base + info->size - 0x00004000;
506 info->start[i--] = base + info->size - 0x00006000;
507 info->start[i--] = base + info->size - 0x00008000;
509 info->start[i] = base + i * 0x00010000;
514 /* check for protected sectors */
515 for (i = 0; i < info->sector_count; i++) {
516 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
517 /* D0 = 1 if protected */
518 addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
519 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
520 info->protect[i] = 0;
522 info->protect[i] = addr2[2] & 1;
526 * Prevent writes to uninitialized FLASH.
528 if (info->flash_id != FLASH_UNKNOWN) {
529 addr2 = (FLASH_WORD_SIZE *)info->start[0];
530 *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
536 int wait_for_DQ7(flash_info_t *info, int sect)
538 ulong start, now, last;
539 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
541 start = get_timer (0);
543 while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
544 if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
545 printf ("Timeout\n");
548 /* show that we're waiting */
549 if ((now - last) > 1000) { /* every second */
557 int intel_wait_for_DQ7(flash_info_t *info, int sect)
559 ulong start, now, last, status;
560 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
562 start = get_timer (0);
564 while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
565 if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
566 printf ("Timeout\n");
569 /* show that we're waiting */
570 if ((now - last) > 1000) { /* every second */
575 status = addr[0] & (FLASH_WORD_SIZE)0x00280028;
576 /* clear status register */
577 addr[0] = (FLASH_WORD_SIZE)0x00500050;
578 /* check status for block erase fail and VPP low */
579 return (status == 0 ? ERR_OK : ERR_NOT_ERASED);
582 /*-----------------------------------------------------------------------
585 int flash_erase (flash_info_t *info, int s_first, int s_last)
587 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
588 volatile FLASH_WORD_SIZE *addr2;
589 int flag, prot, sect, l_sect;
593 if ((s_first < 0) || (s_first > s_last)) {
594 if (info->flash_id == FLASH_UNKNOWN) {
595 printf ("- missing\n");
597 printf ("- no sectors to erase\n");
602 if (info->flash_id == FLASH_UNKNOWN) {
603 printf ("Can't erase unknown flash type - aborted\n");
608 for (sect=s_first; sect<=s_last; ++sect) {
609 if (info->protect[sect]) {
615 printf ("- Warning: %d protected sectors will not be erased!\n",
623 /* Disable interrupts which might cause a timeout here */
624 flag = disable_interrupts();
626 /* Start erase on unprotected sectors */
627 for (sect = s_first; sect<=s_last; sect++) {
628 if (info->protect[sect] == 0) { /* not protected */
629 addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
630 /* printf("Erasing sector %p\n", addr2); */ /* CLH */
631 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
632 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
633 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
634 addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
635 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
636 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
637 addr2[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
639 udelay(1000); /* wait 1 ms */
640 rcode |= wait_for_DQ7(info, sect);
643 if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
644 addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector */
645 addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
646 intel_wait_for_DQ7(info, sect);
647 addr2[0] = (FLASH_WORD_SIZE)0x00200020; /* sector erase */
648 addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
649 rcode |= intel_wait_for_DQ7(info, sect);
652 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
653 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
654 addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
655 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
656 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
657 addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
658 rcode |= wait_for_DQ7(info, sect);
663 * Wait for each sector to complete, it's more
664 * reliable. According to AMD Spec, you must
665 * issue all erase commands within a specified
666 * timeout. This has been seen to fail, especially
667 * if printf()s are included (for debug)!!
669 /* wait_for_DQ7(info, sect); */
673 /* re-enable interrupts if necessary */
677 /* wait at least 80us - let's wait 1 ms */
682 * We wait for the last triggered sector
686 wait_for_DQ7(info, l_sect);
690 /* reset to read mode */
691 addr = (FLASH_WORD_SIZE *)info->start[0];
692 addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
701 void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt)
704 volatile FLASH_WORD_SIZE *addr2;
707 for(i=info->sector_count-1;i>0;i--)
709 if(addr>=info->start[i])
713 addr2 = (FLASH_WORD_SIZE *)(info->start[i]);
714 addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector setup */
715 addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* unlock sector */
716 intel_wait_for_DQ7(info, i);
718 c-=(info->start[i]-info->start[i-1]);
723 /*-----------------------------------------------------------------------
724 * Copy memory to flash, returns:
727 * 2 - Flash not erased
730 int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
735 if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
736 unlock_intel_sectors(info,addr,cnt);
738 wp = (addr & ~3); /* get lower word aligned address */
740 * handle unaligned start bytes
742 if ((l = addr - wp) != 0) {
744 for (i=0, cp=wp; i<l; ++i, ++cp) {
745 data = (data << 8) | (*(uchar *)cp);
747 for (; i<4 && cnt>0; ++i) {
748 data = (data << 8) | *src++;
752 for (; cnt==0 && i<4; ++i, ++cp) {
753 data = (data << 8) | (*(uchar *)cp);
756 if ((rc = write_word(info, wp, data)) != 0) {
763 * handle word aligned part
767 for (i=0; i<4; ++i) {
768 data = (data << 8) | *src++;
770 if ((rc = write_word(info, wp, data)) != 0) {
774 if((wp % 0x10000)==0)
775 printf("."); /* show Progress */
784 * handle unaligned tail bytes
787 for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
788 data = (data << 8) | *src++;
791 for (; i<4; ++i, ++cp) {
792 data = (data << 8) | (*(uchar *)cp);
794 rc=write_word(info, wp, data);
798 /*-----------------------------------------------------------------------
799 * Write a word to Flash, returns:
802 * 2 - Flash not erased
804 static FLASH_WORD_SIZE *read_val = (FLASH_WORD_SIZE *)0x200000;
806 static int write_word (flash_info_t *info, ulong dest, ulong data)
808 volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]);
809 volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest;
810 volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data;
815 /* Check if Flash is (sufficiently) erased */
816 if ((*((volatile FLASH_WORD_SIZE *)dest) &
817 (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
820 /* Disable interrupts which might cause a timeout here */
821 flag = disable_interrupts();
822 for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++)
824 if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
825 /* intel style writting */
826 dest2[i] = (FLASH_WORD_SIZE)0x00500050;
827 dest2[i] = (FLASH_WORD_SIZE)0x00400040;
828 *read_val++ = data2[i];
832 /* data polling for D7 */
833 start = get_timer (0);
835 while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080)
837 if (get_timer(start) > CFG_FLASH_WRITE_TOUT)
840 dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
842 dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
843 if(dest2[i]!=data2[i])
844 printf("Error at %p 0x%04X != 0x%04X\n",&dest2[i],dest2[i],data2[i]);
847 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
848 addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
849 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0;
851 /* re-enable interrupts if necessary */
854 /* data polling for D7 */
855 start = get_timer (0);
856 while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) !=
857 (data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
858 if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
867 /*-----------------------------------------------------------------------