2 * (C) Copyright 2000, 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * Wait for completion of each sector erase command issued
28 * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
33 * - adapted for pip405, Denis Peter, MPL AG Switzerland
40 #if !defined(CONFIG_PATI)
42 #include <asm/processor.h>
43 #include "common_util.h"
44 #if defined(CONFIG_MIP405)
45 #include "../mip405/mip405.h"
47 #if defined(CONFIG_PIP405)
48 #include "../pip405/pip405.h"
50 #include <asm/4xx_pci.h>
51 #else /* defined(CONFIG_PATI) */
55 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
56 /*-----------------------------------------------------------------------
59 static ulong flash_get_size (vu_long *addr, flash_info_t *info);
60 static int write_word (flash_info_t *info, ulong dest, ulong data);
62 void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt);
66 #define FLASH_WORD_SIZE unsigned short
71 #if !defined(CONFIG_PATI)
73 /*-----------------------------------------------------------------------
74 * Some CS switching routines:
76 * On PIP/MIP405 we have 3 (4) possible boot mode
78 * - Boot from Flash (Flash CS = CS0, MPS CS = CS1)
79 * - Boot from MPS (Flash CS = CS1, MPS CS = CS0)
80 * - Boot from PCI with Flash map (Flash CS = CS0, MPS CS = CS1)
81 * - Boot from PCI with MPS map (Flash CS = CS1, MPS CS = CS0)
82 * The flash init is the first board specific routine which is called
83 * after code relocation (running from SDRAM)
84 * The first thing we do is to map the Flash CS to the Flash area and
85 * the MPS CS to the MPS area. Since the flash size is unknown at this
86 * point, we use the max flash size and the lowest flash address as base.
88 * After flash detection we adjust the size of the CS area accordingly.
89 * The board_init_r will fill in wrong values in the board init structure,
90 * but this will be fixed in the misc_init_r routine:
91 * bd->bi_flashstart=0-flash_info[0].size
92 * bd->bi_flashsize=flash_info[0].size-CONFIG_SYS_MONITOR_LEN
93 * bd->bi_flashoffset=0
96 int get_boot_mode(void)
100 pbcr = mfdcr (strap);
101 if ((pbcr & PSR_ROM_WIDTH_MASK) == 0)
102 /* boot via MPS or MPS mapping */
104 if(pbcr & PSR_ROM_LOC)
110 /* Map the flash high (in boot area)
111 This code can only be executed from SDRAM (after relocation).
113 void setup_cs_reloc(void)
116 /* Since we are relocated, we can set-up the CS finaly
117 * but first of all, switch off PCI mapping (in case it was a PCI boot) */
119 icache_enable (); /* we are relocated */
121 mode=get_boot_mode();
122 /* we map the flash high in every case */
123 /* first findout on which cs the flash is */
124 if(mode & BOOT_MPS) {
125 /* map flash high on CS1 and MPS on CS0 */
126 mtdcr (ebccfga, pb0ap);
127 mtdcr (ebccfgd, MPS_AP);
128 mtdcr (ebccfga, pb0cr);
129 mtdcr (ebccfgd, MPS_CR);
130 /* we use the default values (max values) for the flash
131 * because its real size is not yet known */
132 mtdcr (ebccfga, pb1ap);
133 mtdcr (ebccfgd, FLASH_AP);
134 mtdcr (ebccfga, pb1cr);
135 mtdcr (ebccfgd, FLASH_CR_B);
138 /* map flash high on CS0 and MPS on CS1 */
139 mtdcr (ebccfga, pb1ap);
140 mtdcr (ebccfgd, MPS_AP);
141 mtdcr (ebccfga, pb1cr);
142 mtdcr (ebccfgd, MPS_CR);
143 /* we use the default values (max values) for the flash
144 * because its real size is not yet known */
145 mtdcr (ebccfga, pb0ap);
146 mtdcr (ebccfgd, FLASH_AP);
147 mtdcr (ebccfga, pb0cr);
148 mtdcr (ebccfgd, FLASH_CR_B);
152 #endif /* #if !defined(CONFIG_PATI) */
154 unsigned long flash_init (void)
156 unsigned long size_b0;
159 #if !defined(CONFIG_PATI)
160 unsigned long size_b1,flashcr,size_reg;
162 extern char version_string;
163 char *p = &version_string;
165 /* Since we are relocated, we can set-up the CS finally */
167 /* get and display boot mode */
168 mode=get_boot_mode();
170 printf("(PCI Boot %s Map) ",(mode & BOOT_MPS) ?
173 printf("(%s Boot) ",(mode & BOOT_MPS) ?
175 #endif /* #if !defined(CONFIG_PATI) */
176 /* Init: no FLASHes known */
177 for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
178 flash_info[i].flash_id = FLASH_UNKNOWN;
181 /* Static FLASH Bank configuration here - FIXME XXX */
183 size_b0 = flash_get_size((vu_long *)CONFIG_SYS_MONITOR_BASE, &flash_info[0]);
185 if (flash_info[0].flash_id == FLASH_UNKNOWN) {
186 printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
187 size_b0, size_b0<<20);
189 /* protect the bootloader */
190 /* Monitor protection ON by default */
191 #if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
192 flash_protect(FLAG_PROTECT_SET,
193 CONFIG_SYS_MONITOR_BASE,
194 CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
197 #if !defined(CONFIG_PATI)
198 /* protect reset vector */
199 flash_info[0].protect[flash_info[0].sector_count-1] = 1;
201 flash_info[0].size = size_b0;
202 /* set up flash cs according to the size */
203 size_reg=(flash_info[0].size >>20);
206 case 1: i=0; break; /* <= 1MB */
207 case 2: i=1; break; /* = 2MB */
208 case 4: i=2; break; /* = 4MB */
209 case 8: i=3; break; /* = 8MB */
210 case 16: i=4; break; /* = 16MB */
211 case 32: i=5; break; /* = 32MB */
212 case 64: i=6; break; /* = 64MB */
213 case 128: i=7; break; /*= 128MB */
215 printf("\n #### ERROR, wrong size %ld MByte reset board #####\n",size_reg);
218 if(mode & BOOT_MPS) {
219 /* flash is on CS1 */
220 mtdcr(ebccfga, pb1cr);
221 flashcr = mfdcr (ebccfgd);
222 /* we map the flash high in every case */
223 flashcr&=0x0001FFFF; /* mask out address bits */
224 flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
225 flashcr|= (i << 17); /* size addr */
226 mtdcr(ebccfga, pb1cr);
227 mtdcr(ebccfgd, flashcr);
230 /* flash is on CS0 */
231 mtdcr(ebccfga, pb0cr);
232 flashcr = mfdcr (ebccfgd);
233 /* we map the flash high in every case */
234 flashcr&=0x0001FFFF; /* mask out address bits */
235 flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
236 flashcr|= (i << 17); /* size addr */
237 mtdcr(ebccfga, pb0cr);
238 mtdcr(ebccfgd, flashcr);
241 /* enable this (PIP405/MIP405 only) if you want to test if
242 the relocation has be done ok.
243 This will disable both Chipselects */
244 mtdcr (ebccfga, pb0cr);
246 mtdcr (ebccfga, pb1cr);
248 printf("CS0 & CS1 switched off for test\n");
250 /* patch version_string */
251 for(i=0;i<0x100;i++) {
258 #else /* #if !defined(CONFIG_PATI) */
259 #ifdef CONFIG_ENV_IS_IN_FLASH
260 /* ENV protection ON by default */
261 flash_protect(FLAG_PROTECT_SET,
263 CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE-1,
266 #endif /* #if !defined(CONFIG_PATI) */
271 /*-----------------------------------------------------------------------
273 void flash_print_info (flash_info_t *info)
279 volatile unsigned long *flash;
281 if (info->flash_id == FLASH_UNKNOWN) {
282 printf ("missing or unknown FLASH type\n");
286 switch (info->flash_id & FLASH_VENDMASK) {
287 case FLASH_MAN_AMD: printf ("AMD "); break;
288 case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
289 case FLASH_MAN_SST: printf ("SST "); break;
290 case FLASH_MAN_INTEL: printf ("Intel "); break;
291 default: printf ("Unknown Vendor "); break;
294 switch (info->flash_id & FLASH_TYPEMASK) {
295 case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n");
297 case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
299 case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
301 case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
303 case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
305 case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
307 case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
309 case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
311 case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
313 case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
315 case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
317 case FLASH_INTEL320T: printf ("TE28F320C3 (32 Mbit, top sector size)\n");
319 case FLASH_AM640U: printf ("AM29LV640U (64 Mbit, uniform sector size)\n");
321 default: printf ("Unknown Chip Type\n");
325 printf (" Size: %ld KB in %d Sectors\n",
326 info->size >> 10, info->sector_count);
328 printf (" Sector Start Addresses:");
329 for (i=0; i<info->sector_count; ++i) {
331 * Check if whole sector is erased
333 if (i != (info->sector_count-1))
334 size = info->start[i+1] - info->start[i];
336 size = info->start[0] + info->size - info->start[i];
338 flash = (volatile unsigned long *)info->start[i];
339 size = size >> 2; /* divide by 4 for longword access */
340 for (k=0; k<size; k++) {
341 if (*flash++ != 0xffffffff) {
348 printf (" %08lX%s%s",
351 info->protect[i] ? "RO " : " ");
356 /*-----------------------------------------------------------------------
360 /*-----------------------------------------------------------------------
365 * The following code cannot be run from FLASH!
367 static ulong flash_get_size (vu_long *addr, flash_info_t *info)
370 FLASH_WORD_SIZE value;
372 volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
374 /* Write auto select command: read Manufacturer ID */
375 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
376 addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
377 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
380 /* printf("flash_get_size value: %x\n",value); */
382 case (FLASH_WORD_SIZE)AMD_MANUFACT:
383 info->flash_id = FLASH_MAN_AMD;
385 case (FLASH_WORD_SIZE)FUJ_MANUFACT:
386 info->flash_id = FLASH_MAN_FUJ;
388 case (FLASH_WORD_SIZE)INTEL_MANUFACT:
389 info->flash_id = FLASH_MAN_INTEL;
391 case (FLASH_WORD_SIZE)SST_MANUFACT:
392 info->flash_id = FLASH_MAN_SST;
395 info->flash_id = FLASH_UNKNOWN;
396 info->sector_count = 0;
398 return (0); /* no or unknown flash */
400 value = addr2[1]; /* device ID */
401 /* printf("Device value %x\n",value); */
403 case (FLASH_WORD_SIZE)AMD_ID_F040B:
404 info->flash_id += FLASH_AM040;
405 info->sector_count = 8;
406 info->size = 0x0080000; /* => 512 ko */
408 case (FLASH_WORD_SIZE)AMD_ID_LV400T:
409 info->flash_id += FLASH_AM400T;
410 info->sector_count = 11;
411 info->size = 0x00080000;
412 break; /* => 0.5 MB */
414 case (FLASH_WORD_SIZE)AMD_ID_LV400B:
415 info->flash_id += FLASH_AM400B;
416 info->sector_count = 11;
417 info->size = 0x00080000;
418 break; /* => 0.5 MB */
420 case (FLASH_WORD_SIZE)AMD_ID_LV800T:
421 info->flash_id += FLASH_AM800T;
422 info->sector_count = 19;
423 info->size = 0x00100000;
426 case (FLASH_WORD_SIZE)AMD_ID_LV800B:
427 info->flash_id += FLASH_AM800B;
428 info->sector_count = 19;
429 info->size = 0x00100000;
432 case (FLASH_WORD_SIZE)AMD_ID_LV160T:
433 info->flash_id += FLASH_AM160T;
434 info->sector_count = 35;
435 info->size = 0x00200000;
438 case (FLASH_WORD_SIZE)AMD_ID_LV160B:
439 info->flash_id += FLASH_AM160B;
440 info->sector_count = 35;
441 info->size = 0x00200000;
443 case (FLASH_WORD_SIZE)AMD_ID_LV320T:
444 info->flash_id += FLASH_AM320T;
445 info->sector_count = 67;
446 info->size = 0x00400000;
448 case (FLASH_WORD_SIZE)AMD_ID_LV640U:
449 info->flash_id += FLASH_AM640U;
450 info->sector_count = 128;
451 info->size = 0x00800000;
453 #if 0 /* enable when device IDs are available */
455 case (FLASH_WORD_SIZE)AMD_ID_LV320B:
456 info->flash_id += FLASH_AM320B;
457 info->sector_count = 67;
458 info->size = 0x00400000;
461 case (FLASH_WORD_SIZE)SST_ID_xF800A:
462 info->flash_id += FLASH_SST800A;
463 info->sector_count = 16;
464 info->size = 0x00100000;
466 case (FLASH_WORD_SIZE)INTEL_ID_28F320C3T:
467 info->flash_id += FLASH_INTEL320T;
468 info->sector_count = 71;
469 info->size = 0x00400000;
473 case (FLASH_WORD_SIZE)SST_ID_xF160A:
474 info->flash_id += FLASH_SST160A;
475 info->sector_count = 32;
476 info->size = 0x00200000;
480 info->flash_id = FLASH_UNKNOWN;
481 return (0); /* => no or unknown flash */
484 /* base address calculation */
486 /* set up sector start address table */
487 if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
488 (info->flash_id == FLASH_AM040) ||
489 (info->flash_id == FLASH_AM640U)){
490 for (i = 0; i < info->sector_count; i++)
491 info->start[i] = base + (i * 0x00010000);
494 if (info->flash_id & FLASH_BTYPE) {
495 /* set sector offsets for bottom boot block type */
496 info->start[0] = base + 0x00000000;
497 info->start[1] = base + 0x00004000;
498 info->start[2] = base + 0x00006000;
499 info->start[3] = base + 0x00008000;
500 for (i = 4; i < info->sector_count; i++)
501 info->start[i] = base + (i * 0x00010000) - 0x00030000;
504 /* set sector offsets for top boot block type */
505 i = info->sector_count - 1;
506 if(info->sector_count==71) {
508 info->start[i--] = base + info->size - 0x00002000;
509 info->start[i--] = base + info->size - 0x00004000;
510 info->start[i--] = base + info->size - 0x00006000;
511 info->start[i--] = base + info->size - 0x00008000;
512 info->start[i--] = base + info->size - 0x0000A000;
513 info->start[i--] = base + info->size - 0x0000C000;
514 info->start[i--] = base + info->size - 0x0000E000;
516 info->start[i] = base + i * 0x000010000;
519 info->start[i--] = base + info->size - 0x00004000;
520 info->start[i--] = base + info->size - 0x00006000;
521 info->start[i--] = base + info->size - 0x00008000;
523 info->start[i] = base + i * 0x00010000;
528 /* check for protected sectors */
529 for (i = 0; i < info->sector_count; i++) {
530 /* read sector protection at sector address, (A7 .. A0) = 0x02 */
531 /* D0 = 1 if protected */
532 addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
533 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
534 info->protect[i] = 0;
536 info->protect[i] = addr2[2] & 1;
540 * Prevent writes to uninitialized FLASH.
542 if (info->flash_id != FLASH_UNKNOWN) {
543 addr2 = (FLASH_WORD_SIZE *)info->start[0];
544 *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
550 int wait_for_DQ7(flash_info_t *info, int sect)
552 ulong start, now, last;
553 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
555 start = get_timer (0);
557 while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
558 if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
559 printf ("Timeout\n");
562 /* show that we're waiting */
563 if ((now - last) > 1000) { /* every second */
571 int intel_wait_for_DQ7(flash_info_t *info, int sect)
573 ulong start, now, last, status;
574 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
576 start = get_timer (0);
578 while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
579 if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
580 printf ("Timeout\n");
583 /* show that we're waiting */
584 if ((now - last) > 1000) { /* every second */
589 status = addr[0] & (FLASH_WORD_SIZE)0x00280028;
590 /* clear status register */
591 addr[0] = (FLASH_WORD_SIZE)0x00500050;
592 /* check status for block erase fail and VPP low */
593 return (status == 0 ? ERR_OK : ERR_NOT_ERASED);
596 /*-----------------------------------------------------------------------
599 int flash_erase (flash_info_t *info, int s_first, int s_last)
601 volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
602 volatile FLASH_WORD_SIZE *addr2;
603 int flag, prot, sect, l_sect;
607 if ((s_first < 0) || (s_first > s_last)) {
608 if (info->flash_id == FLASH_UNKNOWN) {
609 printf ("- missing\n");
611 printf ("- no sectors to erase\n");
616 if (info->flash_id == FLASH_UNKNOWN) {
617 printf ("Can't erase unknown flash type - aborted\n");
622 for (sect=s_first; sect<=s_last; ++sect) {
623 if (info->protect[sect]) {
629 printf ("- Warning: %d protected sectors will not be erased!\n",
637 /* Disable interrupts which might cause a timeout here */
638 flag = disable_interrupts();
640 /* Start erase on unprotected sectors */
641 for (sect = s_first; sect<=s_last; sect++) {
642 if (info->protect[sect] == 0) { /* not protected */
643 addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
644 /* printf("Erasing sector %p\n", addr2); */ /* CLH */
645 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
646 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
647 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
648 addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
649 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
650 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
651 addr2[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
653 udelay(1000); /* wait 1 ms */
654 rcode |= wait_for_DQ7(info, sect);
657 if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
658 addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector */
659 addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
660 intel_wait_for_DQ7(info, sect);
661 addr2[0] = (FLASH_WORD_SIZE)0x00200020; /* sector erase */
662 addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
663 rcode |= intel_wait_for_DQ7(info, sect);
666 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
667 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
668 addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
669 addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
670 addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
671 addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
672 rcode |= wait_for_DQ7(info, sect);
677 * Wait for each sector to complete, it's more
678 * reliable. According to AMD Spec, you must
679 * issue all erase commands within a specified
680 * timeout. This has been seen to fail, especially
681 * if printf()s are included (for debug)!!
683 /* wait_for_DQ7(info, sect); */
687 /* re-enable interrupts if necessary */
691 /* wait at least 80us - let's wait 1 ms */
696 * We wait for the last triggered sector
700 wait_for_DQ7(info, l_sect);
704 /* reset to read mode */
705 addr = (FLASH_WORD_SIZE *)info->start[0];
706 addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
715 void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt)
718 volatile FLASH_WORD_SIZE *addr2;
721 for(i=info->sector_count-1;i>0;i--)
723 if(addr>=info->start[i])
727 addr2 = (FLASH_WORD_SIZE *)(info->start[i]);
728 addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector setup */
729 addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* unlock sector */
730 intel_wait_for_DQ7(info, i);
732 c-=(info->start[i]-info->start[i-1]);
737 /*-----------------------------------------------------------------------
738 * Copy memory to flash, returns:
741 * 2 - Flash not erased
744 int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
749 if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
750 unlock_intel_sectors(info,addr,cnt);
752 wp = (addr & ~3); /* get lower word aligned address */
754 * handle unaligned start bytes
756 if ((l = addr - wp) != 0) {
758 for (i=0, cp=wp; i<l; ++i, ++cp) {
759 data = (data << 8) | (*(uchar *)cp);
761 for (; i<4 && cnt>0; ++i) {
762 data = (data << 8) | *src++;
766 for (; cnt==0 && i<4; ++i, ++cp) {
767 data = (data << 8) | (*(uchar *)cp);
770 if ((rc = write_word(info, wp, data)) != 0) {
777 * handle word aligned part
781 for (i=0; i<4; ++i) {
782 data = (data << 8) | *src++;
784 if ((rc = write_word(info, wp, data)) != 0) {
788 if((wp % 0x10000)==0)
789 printf("."); /* show Progress */
798 * handle unaligned tail bytes
801 for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
802 data = (data << 8) | *src++;
805 for (; i<4; ++i, ++cp) {
806 data = (data << 8) | (*(uchar *)cp);
808 rc=write_word(info, wp, data);
812 /*-----------------------------------------------------------------------
813 * Write a word to Flash, returns:
816 * 2 - Flash not erased
818 static FLASH_WORD_SIZE *read_val = (FLASH_WORD_SIZE *)0x200000;
820 static int write_word (flash_info_t *info, ulong dest, ulong data)
822 volatile FLASH_WORD_SIZE *addr2 = (volatile FLASH_WORD_SIZE *)(info->start[0]);
823 volatile FLASH_WORD_SIZE *dest2 = (volatile FLASH_WORD_SIZE *)dest;
824 volatile FLASH_WORD_SIZE *data2;
831 data2 = (volatile FLASH_WORD_SIZE *)data_p;
833 /* Check if Flash is (sufficiently) erased */
834 if ((*((volatile FLASH_WORD_SIZE *)dest) &
835 (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
838 /* Disable interrupts which might cause a timeout here */
839 flag = disable_interrupts();
840 for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++)
842 if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
843 /* intel style writting */
844 dest2[i] = (FLASH_WORD_SIZE)0x00500050;
845 dest2[i] = (FLASH_WORD_SIZE)0x00400040;
846 *read_val++ = data2[i];
850 /* data polling for D7 */
851 start = get_timer (0);
853 while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080)
855 if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT)
858 dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
860 dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
861 if(dest2[i]!=data2[i])
862 printf("Error at %p 0x%04X != 0x%04X\n",&dest2[i],dest2[i],data2[i]);
865 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
866 addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
867 addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0;
869 /* re-enable interrupts if necessary */
872 /* data polling for D7 */
873 start = get_timer (0);
874 while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) !=
875 (data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
876 if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
885 /*-----------------------------------------------------------------------