Prepare v2008.10 release: update CHANGELOG & Makefile
[platform/kernel/u-boot.git] / board / mpc8540eval / ddr.c
1 /*
2  * Copyright 2008 Freescale Semiconductor, Inc.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * Version 2 as published by the Free Software Foundation.
7  */
8
9 #include <common.h>
10 #include <i2c.h>
11
12 #include <asm/fsl_ddr_sdram.h>
13
14 static void
15 get_spd(ddr1_spd_eeprom_t *spd, unsigned char i2c_address)
16 {
17         i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr1_spd_eeprom_t));
18 }
19
20
21 unsigned int
22 fsl_ddr_get_mem_data_rate(void)
23 {
24         return get_ddr_freq(0);
25 }
26
27
28 void
29 fsl_ddr_get_spd(ddr1_spd_eeprom_t *ctrl_dimms_spd,
30                       unsigned int ctrl_num)
31 {
32         unsigned int i;
33         unsigned int i2c_address = 0;
34
35         for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) {
36                 if (ctrl_num == 0 && i == 0) {
37                         i2c_address = SPD_EEPROM_ADDRESS;
38                 }
39                 get_spd(&(ctrl_dimms_spd[i]), i2c_address);
40         }
41 }
42
43 void fsl_ddr_board_options(memctl_options_t *popts, unsigned int ctrl_num)
44 {
45         /*
46          * Factors to consider for CPO:
47          *      - frequency
48          *      - ddr1 vs. ddr2
49          */
50         popts->cpo_override = 0;
51
52         /*
53          * Factors to consider for write data delay:
54          *      - number of DIMMs
55          *
56          * 1 = 1/4 clock delay
57          * 2 = 1/2 clock delay
58          * 3 = 3/4 clock delay
59          * 4 = 1   clock delay
60          * 5 = 5/4 clock delay
61          * 6 = 3/2 clock delay
62          */
63         popts->write_data_delay = 3;
64
65         /*
66          * Factors to consider for half-strength driver enable:
67          *      - number of DIMMs installed
68          */
69         popts->half_strength_driver_enable = 0;
70 }