2 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/cpu.h>
11 #include <asm/arch/soc.h>
12 #include <linux/mbus.h>
14 DECLARE_GLOBAL_DATA_PTR;
16 /* Base addresses for the external device chip selects */
17 #define DEV_CS0_BASE 0xe0000000
18 #define DEV_CS1_BASE 0xe1000000
19 #define DEV_CS2_BASE 0xe2000000
20 #define DEV_CS3_BASE 0xe3000000
22 /* Needed for dynamic (board-specific) mbus configuration */
23 extern struct mvebu_mbus_state mbus_state;
25 int board_early_init_f(void)
28 * Don't configure MPP (pin multiplexing) and GPIO here,
29 * its already done in bin_hdr
33 * Setup some board specific mbus address windows
35 mbus_dt_setup_win(&mbus_state, DEV_CS0_BASE, 16 << 20,
36 CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS0);
37 mbus_dt_setup_win(&mbus_state, DEV_CS1_BASE, 16 << 20,
38 CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS1);
39 mbus_dt_setup_win(&mbus_state, DEV_CS2_BASE, 16 << 20,
40 CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS2);
41 mbus_dt_setup_win(&mbus_state, DEV_CS3_BASE, 16 << 20,
42 CPU_TARGET_DEVICEBUS_BOOTROM_SPI, CPU_ATTR_DEV_CS3);
49 /* adress of boot parameters */
50 gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
57 puts("Board: maxBCM\n");
62 #ifdef CONFIG_RESET_PHY_R
63 /* Configure and enable MV88E6185 switch */
66 u16 devadr = CONFIG_PHY_BASE_ADDR;
70 if (miiphy_set_current_dev(name))
73 /* todo: fill this with the real setup / config code */
75 printf("88E6185 Initialized on %s\n", name);
77 #endif /* CONFIG_RESET_PHY_R */