1 // SPDX-License-Identifier: GPL-2.0+
4 * Logic Product Development <www.logicpd.com>
7 * Peter Barada <peter.barada@logicpd.com>
9 * Derived from Beagle Board and 3430 SDP code by
10 * Richard Woodruff <r-woodruff2@ti.com>
11 * Syed Mohammed Khasim <khasim@ti.com>
22 #include <asm/arch/mmc_host_def.h>
23 #include <asm/arch/mux.h>
24 #include <asm/arch/mem.h>
25 #include <asm/arch/sys_proto.h>
27 #include <asm/omap_mmc.h>
28 #include <asm/mach-types.h>
29 #include <linux/mtd/rawnand.h>
30 #include <asm/omap_musb.h>
31 #include <linux/errno.h>
32 #include <linux/usb/ch9.h>
33 #include <linux/usb/gadget.h>
34 #include <linux/usb/musb.h>
35 #include "omap3logic.h"
36 #ifdef CONFIG_USB_EHCI_HCD
38 #include <asm/ehci-omap.h>
41 DECLARE_GLOBAL_DATA_PTR;
43 /* This is only needed until SPL gets OF support */
44 #ifdef CONFIG_SPL_BUILD
45 static const struct ns16550_platdata omap3logic_serial = {
46 .base = OMAP34XX_UART1,
48 .clock = V_NS16550_CLK,
49 .fcr = UART_FCR_DEFVAL,
52 U_BOOT_DEVICE(omap3logic_uart) = {
57 static const struct omap_hsmmc_plat omap3_logic_mmc0_platdata = {
58 .base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE,
59 .cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_4BIT,
61 .cfg.f_max = 52000000,
62 .cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195,
63 .cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT,
66 U_BOOT_DEVICE(am335x_mmc0) = {
68 .platdata = &omap3_logic_mmc0_platdata,
73 #ifdef CONFIG_SPL_OS_BOOT
74 int spl_start_uboot(void)
76 /* break into full u-boot on 'c' */
77 return serial_tstc() && serial_getc() == 'c';
81 #if defined(CONFIG_SPL_BUILD)
83 * Routine: get_board_mem_timings
84 * Description: If we use SPL then there is no x-loader nor config header
85 * so we have to setup the DDR timings ourself on the first bank. This
86 * provides the timing values back to the function that configures
89 void get_board_mem_timings(struct board_sdrc_timings *timings)
91 timings->mr = MICRON_V_MR_165;
93 if (get_cpu_family() == CPU_OMAP36XX) {
94 /* 200 MHz works for OMAP36/DM37 */
96 timings->mcfg = MICRON_V_MCFG_200(256 << 20);
97 timings->ctrla = MICRON_V_ACTIMA_200;
98 timings->ctrlb = MICRON_V_ACTIMB_200;
99 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
101 /* 165 MHz works for OMAP35 */
102 timings->mcfg = MICRON_V_MCFG_165(256 << 20);
103 timings->ctrla = MICRON_V_ACTIMA_165;
104 timings->ctrlb = MICRON_V_ACTIMB_165;
105 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
109 #define GPMC_NAND_COMMAND_0 (OMAP34XX_GPMC_BASE + 0x7c)
110 #define GPMC_NAND_DATA_0 (OMAP34XX_GPMC_BASE + 0x84)
111 #define GPMC_NAND_ADDRESS_0 (OMAP34XX_GPMC_BASE + 0x80)
113 void spl_board_prepare_for_linux(void)
115 /* The Micron NAND starts locked which
116 * prohibits mounting the NAND as RW
117 * The following commands are what unlocks
118 * the NAND to become RW Falcon Mode does not
119 * have as many smarts as U-Boot, but Logic PD
120 * only makes NAND with 512MB so these hard coded
121 * values should work for all current models
124 writeb(0x70, GPMC_NAND_COMMAND_0);
125 writeb(-1, GPMC_NAND_DATA_0);
126 writeb(0x7a, GPMC_NAND_COMMAND_0);
127 writeb(0x00, GPMC_NAND_ADDRESS_0);
128 writeb(0x00, GPMC_NAND_ADDRESS_0);
129 writeb(0x00, GPMC_NAND_ADDRESS_0);
130 writeb(-1, GPMC_NAND_COMMAND_0);
132 /* Begin address 0 */
133 writeb(NAND_CMD_UNLOCK1, 0x6e00007c);
134 writeb(0x00, GPMC_NAND_ADDRESS_0);
135 writeb(0x00, GPMC_NAND_ADDRESS_0);
136 writeb(0x00, GPMC_NAND_ADDRESS_0);
137 writeb(-1, GPMC_NAND_DATA_0);
139 /* Ending address at the end of Flash */
140 writeb(NAND_CMD_UNLOCK2, GPMC_NAND_COMMAND_0);
141 writeb(0xc0, GPMC_NAND_ADDRESS_0);
142 writeb(0xff, GPMC_NAND_ADDRESS_0);
143 writeb(0x03, GPMC_NAND_ADDRESS_0);
144 writeb(-1, GPMC_NAND_DATA_0);
145 writeb(0x79, GPMC_NAND_COMMAND_0);
146 writeb(-1, GPMC_NAND_DATA_0);
147 writeb(-1, GPMC_NAND_DATA_0);
151 #ifdef CONFIG_USB_MUSB_OMAP2PLUS
152 static struct musb_hdrc_config musb_config = {
159 static struct omap_musb_board_data musb_board_data = {
160 .interface_type = MUSB_INTERFACE_ULPI,
163 static struct musb_hdrc_platform_data musb_plat = {
164 #if defined(CONFIG_USB_MUSB_HOST)
166 #elif defined(CONFIG_USB_MUSB_GADGET)
167 .mode = MUSB_PERIPHERAL,
169 #error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
171 .config = &musb_config,
173 .platform_ops = &omap2430_ops,
174 .board_data = &musb_board_data,
178 #if defined(CONFIG_USB_EHCI_HCD) && !defined(CONFIG_SPL_BUILD)
179 /* Call usb_stop() before starting the kernel */
180 void show_boot_progress(int val)
182 if (val == BOOTSTAGE_ID_RUN_OS)
186 static struct omap_usbhs_board_data usbhs_bdata = {
187 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
188 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
189 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
192 int ehci_hcd_init(int index, enum usb_init_type init,
193 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
195 return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
198 int ehci_hcd_stop(int index)
200 return omap_ehci_hcd_stop();
203 #endif /* CONFIG_USB_EHCI_HCD */
206 * Routine: misc_init_r
207 * Description: Configure board specific parts
209 int misc_init_r(void)
211 twl4030_power_init();
212 omap_die_id_display();
214 #ifdef CONFIG_USB_MUSB_OMAP2PLUS
215 musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
222 * Routine: board_init
223 * Description: Early hardware init.
227 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
229 /* boot param addr */
230 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
235 #ifdef CONFIG_BOARD_LATE_INIT
237 static void unlock_nand(void)
239 int dev = nand_curr_device;
240 struct mtd_info *mtd;
242 mtd = get_nand_dev_by_index(dev);
243 nand_unlock(mtd, 0, mtd->size, 0);
246 int board_late_init(void)
248 #ifdef CONFIG_CMD_NAND_LOCK_UNLOCK
255 #if defined(CONFIG_MMC)
256 void board_mmc_power_init(void)
258 twl4030_power_mmc_init(0);
262 #ifdef CONFIG_SMC911X
263 /* GPMC CS1 settings for Logic SOM LV/Torpedo LAN92xx Ethernet chip */
264 static const u32 gpmc_lan92xx_config[] = {
265 NET_LAN92XX_GPMC_CONFIG1,
266 NET_LAN92XX_GPMC_CONFIG2,
267 NET_LAN92XX_GPMC_CONFIG3,
268 NET_LAN92XX_GPMC_CONFIG4,
269 NET_LAN92XX_GPMC_CONFIG5,
270 NET_LAN92XX_GPMC_CONFIG6,
273 int board_eth_init(bd_t *bis)
275 enable_gpmc_cs_config(gpmc_lan92xx_config, &gpmc_cfg->cs[1],
276 CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
278 return smc911x_initialize(0, CONFIG_SMC911X_BASE);