1 // SPDX-License-Identifier: GPL-2.0+
4 * Valentin Lontgchamp, Keymile AG, valentin.longchamp@keymile.com
9 #include <linux/delay.h>
10 #include <linux/errno.h>
12 /* GPIO Pin from kirkwood connected to PROGRAM_B pin of the xilinx FPGA */
13 #define KM_XLX_PROGRAM_B_PIN 39
15 #define BOCO_ADDR 0x10
20 static int check_boco2(void)
25 ret = i2c_read(BOCO_ADDR, ID_REG, 1, &id, 1);
27 printf("%s: error reading the BOCO id !!\n", __func__);
31 return (id == BOCO2_ID);
34 static int boco_clear_bits(u8 reg, u8 flags)
39 /* give access to the EEPROM from FPGA */
40 ret = i2c_read(BOCO_ADDR, reg, 1, ®val, 1);
42 printf("%s: error reading the BOCO @%#x !!\n",
47 ret = i2c_write(BOCO_ADDR, reg, 1, ®val, 1);
49 printf("%s: error writing the BOCO @%#x !!\n",
57 static int boco_set_bits(u8 reg, u8 flags)
62 /* give access to the EEPROM from FPGA */
63 ret = i2c_read(BOCO_ADDR, reg, 1, ®val, 1);
65 printf("%s: error reading the BOCO @%#x !!\n",
70 ret = i2c_write(BOCO_ADDR, reg, 1, ®val, 1);
72 printf("%s: error writing the BOCO @%#x !!\n",
81 #define CFG_EEPROM 0x02
82 #define FPGA_PROG 0x04
83 #define FPGA_INIT_B 0x10
84 #define FPGA_DONE 0x20
86 #ifndef CONFIG_KM_FPGA_FORCE_CONFIG
87 static int fpga_done(void)
92 /* this is only supported with the boco2 design */
96 ret = i2c_read(BOCO_ADDR, SPI_REG, 1, ®val, 1);
98 printf("%s: error reading the BOCO @%#x !!\n",
103 return regval & FPGA_DONE ? 1 : 0;
105 #endif /* CONFIG_KM_FPGA_FORCE_CONFIG */
109 int trigger_fpga_config(void)
114 #ifndef CONFIG_KM_FPGA_FORCE_CONFIG
115 /* if the FPGA is already configured, we do not want to
119 printf("PCIe FPGA config: skipped\n");
123 #endif /* CONFIG_KM_FPGA_FORCE_CONFIG */
126 /* we have a BOCO2, this has to be triggered here */
128 /* make sure the FPGA_can access the EEPROM */
129 ret = boco_clear_bits(SPI_REG, CFG_EEPROM);
133 /* trigger the config start */
134 ret = boco_clear_bits(SPI_REG, FPGA_PROG | FPGA_INIT_B);
138 /* small delay for the pulse */
141 /* up signal for pulse end */
142 ret = boco_set_bits(SPI_REG, FPGA_PROG);
146 /* finally, raise INIT_B to remove the config delay */
147 ret = boco_set_bits(SPI_REG, FPGA_INIT_B);
152 /* we do it the old way, with the gpio pin */
153 kw_gpio_set_valid(KM_XLX_PROGRAM_B_PIN, 1);
154 kw_gpio_direction_output(KM_XLX_PROGRAM_B_PIN, 0);
155 /* small delay for the pulse */
157 kw_gpio_direction_input(KM_XLX_PROGRAM_B_PIN);
163 int wait_for_fpga_config(void)
172 if (!check_boco2()) {
173 /* we do not have BOCO2, this is not really used */
177 printf("PCIe FPGA config:");
179 ret = i2c_read(BOCO_ADDR, SPI_REG, 1, &spictrl, 1);
181 printf("%s: error reading the BOCO spictrl !!\n",
185 if (timeout-- == 0) {
186 printf(" FPGA_DONE timeout\n");
190 } while (!(spictrl & FPGA_DONE));
197 #if defined(CONFIG_KM_FPGA_NO_RESET)
200 /* no dedicated reset pin for FPGA */
206 #define PCIE_RST 0x10
207 #define TRAFFIC_RST 0x04
214 if (!check_boco2()) {
215 /* we do not have BOCO2, this is not really used */
219 /* if we have skipped, we only want to reset the PCIe part */
220 resets = skip ? PCIE_RST : PCIE_RST | TRAFFIC_RST;
222 ret = boco_clear_bits(PRST1, resets);
226 /* small delay for the pulse */
229 ret = boco_set_bits(PRST1, resets);
237 /* the FPGA was configured, we configure the BOCO2 so that the EEPROM
238 * is available from the Bobcat SPI bus */
239 int toggle_eeprom_spi_bus(void)
243 if (!check_boco2()) {
244 /* we do not have BOCO2, this is not really used */
248 ret = boco_set_bits(SPI_REG, CFG_EEPROM);