1 // SPDX-License-Identifier: GPL-2.0+
4 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
10 #include <asm/arch/imx-regs.h>
11 #include <asm/arch/sys_proto.h>
12 #include <asm/arch/crm_regs.h>
13 #include <asm/arch/clock.h>
14 #include <asm/arch/iomux-mx53.h>
15 #include <asm/arch/clock.h>
18 #include <power/pmic.h>
20 #include <bootstage.h>
21 #include "kp_id_rev.h"
23 #define BOOSTER_OFF IMX_GPIO_NR(2, 23)
24 #define LCD_BACKLIGHT IMX_GPIO_NR(1, 1)
25 #define KEY1 IMX_GPIO_NR(2, 26)
26 #define LED_RED IMX_GPIO_NR(3, 28)
28 DECLARE_GLOBAL_DATA_PTR;
34 size = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
40 int dram_init_banksize(void)
42 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
43 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
48 static int power_init(void)
53 ret = pmic_get("mc34708@8", &dev);
55 printf("%s: mc34708 not found !\n", __func__);
59 /* Set VDDGP to 1.110V for 800 MHz on SW1 */
60 pmic_clrsetbits(dev, REG_SW_0, SWx_VOLT_MASK_MC34708,
63 /* Set VCC as 1.30V on SW2 */
64 pmic_clrsetbits(dev, REG_SW_1, SWx_VOLT_MASK_MC34708,
67 /* Set global reset timer to 4s */
68 pmic_clrsetbits(dev, REG_POWER_CTL2, TIMER_MASK_MC34708,
74 static void setup_clocks(void)
77 u32 ref_clk = MXC_HCLK;
79 * CPU clock set to 800MHz and DDR to 400MHz
81 ret = mxc_set_clock(ref_clk, 800, MXC_ARM_CLK);
83 printf("CPU: Switch CPU clock to 800MHZ failed\n");
85 ret = mxc_set_clock(ref_clk, 400, MXC_PERIPH_CLK);
86 ret |= mxc_set_clock(ref_clk, 400, MXC_DDR_CLK);
88 printf("CPU: Switch DDR clock to 400MHz failed\n");
91 static void setup_ups(void)
93 gpio_request(BOOSTER_OFF, "BOOSTER_OFF");
94 gpio_direction_output(BOOSTER_OFF, 0);
97 int board_early_init_f(void)
103 * Do not overwrite the console
104 * Use always serial for U-Boot console
106 int overwrite_console(void)
113 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
118 void board_disable_display(void)
120 gpio_request(LCD_BACKLIGHT, "LCD_BACKLIGHT");
121 gpio_direction_output(LCD_BACKLIGHT, 0);
124 void board_misc_setup(void)
126 gpio_request(KEY1, "KEY1_GPIO");
127 gpio_direction_input(KEY1);
129 if (gpio_get_value(KEY1))
130 env_set("key1", "off");
132 env_set("key1", "on");
135 int board_late_init(void)
139 board_disable_display();
147 printf("Error %d reading EEPROM content!\n", ret);
158 #define GPIO_GDIR 0x4
159 #define GPIO_ALT1 0x1
160 #define GPIO5_BASE 0x53FDC000
161 #define IOMUXC_EIM_WAIT 0x53FA81E4
162 /* Green LED: GPIO5_0 */
163 #define GPIO_GREEN BIT(0)
165 void show_boot_progress(int status)
168 * This BOOTSTAGE_ID is called at very early stage of execution. DM gpio
169 * is not yet initialized.
171 if (status == BOOTSTAGE_ID_START_UBOOT_F) {
173 * After ROM execution the EIM_WAIT PAD is set as ALT0
174 * (according to RM it shall be ALT1 after reset). To use it as
175 * GPIO we need to set it to ALT1.
177 setbits_le32(((uint32_t *)(IOMUXC_EIM_WAIT)), GPIO_ALT1);
179 /* Configure green LED GPIO pin direction */
180 setbits_le32(((uint32_t *)(GPIO5_BASE + GPIO_GDIR)),
182 /* Turn on green LED */
183 setbits_le32(((uint32_t *)(GPIO5_BASE + GPIO_DR)), GPIO_GREEN);
187 * This BOOTSTAGE_ID is called just before handling execution to kernel
188 * - i.e. gpio subsystem is already initialized
190 if (status == BOOTSTAGE_ID_BOOTM_HANDOFF) {
192 * Off green LED - the same approach - i.e. non dm gpio
193 * (*bits_le32) is used as in the very early stage.
195 clrbits_le32(((uint32_t *)(GPIO5_BASE + GPIO_DR)),
201 gpio_request(LED_RED, "LED_RED_ERROR");
202 gpio_direction_output(LED_RED, 1);